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SPD6722QCCE 参数 Datasheet PDF下载

SPD6722QCCE图片预览
型号: SPD6722QCCE
PDF下载: 下载PDF文件 查看货源
内容描述: ISA到PC卡( PCMCIA )控制器 [ISA-to-PC-Card (PCMCIA) Controllers]
分类和应用: 总线控制器微控制器和处理器PC
文件页数/大小: 138 页 / 837 K
品牌: INTEL [ INTEL CORPORATION ]
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers
Table 32. Word I/O Read/Write Timing
Symbol
t
1
t
2
t
3
t
4
t
5
t
ref
t
6
t
7
t
6
t
9
t
10
Parameter
-REG or Address setup to Command active
1
Command pulse width
2
Address hold and Write Data valid from Command inactive
3
-WAIT active from Command active
4
Command hold from -WAIT inactive
Card -IOIS16 delay from valid Address (PC Card specification)
-IOIS16 setup time before Command end
-CE2 delay from -IOIS16 active
5
Data valid from -WAIT inactive
Data setup before -IORD inactive
Data hold after -IORD inactive
(2 Tcp) + 10
0
(3 Tcp) + 10
Tcp – 10
Tcp + 10
(2 Tcp) + 10
35
MIN
(S
×
Tcp) – 10
(C
×
Tcp) – 10
(R
×
Tcp) – 10
(C – 2)Tcp – 10
MAX
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1. The Setup time is determined by the value programmed into the
Setup Timing
register, index 3Ah/3Dh. Using the Timer Set
0 default value of 01h, the setup time would be 70 ns. S = (N
pres
×
N
val
+ 1), see
2. The Command time is determined by the value programmed into the
Command Timing
register, index 3Bh/3Eh. Using the
Timer Set 0 default value of 06h, the Command time would be 270 ns. C = (N
pres
×
N
val
+ 1), see page
3. The Recovery time is determined by the value programmed into the
Recovery Timing
register, index 3Ch/3Fh. Using the
Timer Set 0 default value of 03h, the hold (Recovery) time would be 150 ns. R = (N
pres
×
N
val
+ 1), see page
4. For typical active timing programmed at 280 ns, maximum -WAIT timing is 190 ns after Command active.
5. -IOIS16 must go low within 3Tcp + 10 ns of the cycle beginning or -IOIS16 will be ignored and -CE will not be activated.
112
Datasheet