E
BYTE-WIDE SMART 5 FlashFile™ MEMORY FAMILY
1.2 Product Overview
1.0 INTRODUCTION
This datasheet contains 4-, 8-, and 16-Mbit Smart 5
The byte-wide Smart 5 FlashFile memory family
provides density upgrades with pinout compatibility
for the 4-, 8-, and 16-Mbit densities. The 28F004S5,
28F008S5, and 28F016S5 are high-performance
memories arranged as 512 Kbyte, 1 Mbyte, and
2 Mbyte of 8 bits. This data is grouped in eight,
sixteen, and thirty-two 64-Kbyte blocks which are
individually erasable, lockable, and unlockable in-
FlashFile memory specifications. Section
1
provides a flash memory overview. Sections 2, 3, 4,
and
5
describe the memory organization and
Section covers electrical
functionality.
6
specifications for commercial and extended
temperature product offerings. The byte-wide Smart
5 FlashFile memory family documentation also
includes application notes and design tools which
are referenced in Appendix B.
system. Figure
organization.
4
illustrates the memory
SmartVoltage technology enables fast factory
programming and low power designs. Specifically
1.1
New Features
designed for 5V systems, Smart
5 FlashFile
components support read operations at 5V VCC and
block erase and program operations at 5V and 12V
The byte-wide Smart 5 FlashFile memory family
maintains backwards-compatibility with Intel’s
28F008SA. Key enhancements include:
VPP. The 12V VPP option renders the fastest
program performance which will increase your
factory throughput. With the 5V VPP option, VCC and
VPP can be tied together for a simple 5V design. In
addition to the voltage flexibility, the dedicated VPP
pin gives complete data protection when
•
•
•
SmartVoltage Technology
Enhanced Suspend Capabilities
In-System Block Locking
V
PP ≤ VPPLK.
They share a compatible status register, software
commands, and pinouts. These similarities enable
a clean upgrade from the 28F008SA to byte-wide
Smart 5 FlashFile products. When upgrading, it is
important to note the following differences:
Internal VPP detection circuitry automatically
configures the device for optimized block erase and
program operations.
A Command User Interface (CUI) serves as the
interface between the system processor and
internal operation of the device. A valid command
sequence written to the CUI initiates device
automation. An internal Write State Machine (WSM)
automatically executes the algorithms and timings
necessary for block erase, program, and lock-bit
configuration operations.
•
Because of new feature and density options,
the devices have different device identifier
codes. This allows for software optimization.
•
VPPLK has been lowered from 6.5V to 1.5V to
support low VPP voltages during block erase,
program, and lock-bit configuration operations.
Designs that switch VPP off during read
operations should transition VPP to GND.
A block erase operation erases one of the device’s
64-Kbyte blocks typically within
1
second
(12V VPP), independent of other blocks. Each block
can be independently erased 100,000 times
(1.6 million block erases per device). A block erase
suspend operation allows system software to
suspend block erase to read data from or program
data to any other block.
•
To take advantage of SmartVoltage tech-
nology, allow VPP connection to 5V.
For more details see application note AP-625,
28F008SC Compatibility with 28F008SA (order
number 292180).
Data is programmed in byte increments typically
within
6 µs (12V VPP). A program suspend
operation permits system software to read data or
execute code from any other flash memory array
location.
5
PRODUCT PREVIEW
INTEL [ INTEL ]
