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IRF7805 参数 Datasheet PDF下载

IRF7805图片预览
型号: IRF7805
PDF下载: 下载PDF文件 查看货源
内容描述: 芯片组为DC- DC转换器 [Chip-Set for DC-DC Converters]
分类和应用: 晶体转换器晶体管开关脉冲光电二极管
文件页数/大小: 8 页 / 238 K
品牌: IRF [ INTERNATIONAL RECTIFIER ]
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IRF7805/IRF7805A
Power MOSFET Selection for DC/DC
Converters
Control FET
Special attention has been given to the power losses
in the switching elements of the circuit - Q1 and Q2.
Power losses in the high side switch Q1, also called the
Control FET, are impacted by the R
ds(on)
of the MOSFET,
but these conduction losses are only about one half of
the total losses.
Power losses in the control switch Q1 are given by;
4
Drain Current
1
Gate Voltage
t2
t1
V
GTH
t0
2
t3
Q
GS1
Q
GS2
Q
GD
P
loss
= P
conduction
+ P
switching
+ P
drive
+ P
output
This can be expanded and approximated by;
Drain Voltage
Figure 1: Typical MOSFET switching waveform
P
loss
=
(
I
rms 2
×
R
ds(on)
)
Q
Q
 
+ 
I
×
gd
×
V
in
×
f
 + 
I
×
gs2
×
V
in
×
f
i
g
i
g
 
+
(
Q
g
×
V
g
×
f
)
+
Q
oss
×
V
in
×
f
2
Synchronous FET
The power loss equation for Q2 is approximated
by;
*
P
loss
=
P
conduction
+
P
drive
+
P
output
P
loss
=
I
rms
×
R
ds(on)
+
(
Q
g
×
V
g
×
f
)
(
2
)
This simplified loss equation includes the terms Q
gs2
and Q
oss
which are new to Power MOSFET data sheets.
Q
gs2
is a sub element of traditional gate-source charge
that is included in all MOSFET data sheets. The impor-
tance of splitting this gate-source charge into two sub
elements, Q
gs1
and Q
gs2
, can be seen from Fig 1.
Q
gs2
indicates the charge that must be supplied by
the gate driver between the time that the threshold volt-
age has been reached (t1) and the time the drain cur-
rent rises to I
dmax
(t2) at which time the drain voltage
begins to change. Minimizing Q
gs2
is a critical factor in
reducing switching losses in Q1.
Q
oss
is the charge that must be supplied to the output
capacitance of the MOSFET during every switching
cycle. Figure 2 shows how Q
oss
is formed by the paral-
lel combination of the voltage dependant (non-linear)
capacitance’s C
ds
and C
dg
when multiplied by the power
supply input buss voltage.
Q
Q
+ 
oss
×
V
in
×
f
+
(
rr
×
V
in
×
f
)
2
*dissipated primarily in Q1.
www.irf.com
3