IRLR/U024NPbF
800
15
12
9
V
C
C
C
= 0V,
f = 1MHz
I
= 11A
D
GS
iss
rss
oss
= C + C
,
C
SHORTED
gs
gd
gd
ds
V
V
= 44V
= 28V
DS
DS
= C
= C + C
ds
gd
C
iss
600
400
200
0
C
C
oss
6
rss
3
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
A
1
10
100
0
4
8
12
16
20
V
, Drain-to-Source Voltage (V)
Q
, Total Gate Charge (nC)
DS
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
100
10
1
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
T = 175°C
J
T = 25°C
J
10µs
100µs
T
T
= 25°C
= 175°C
Single Pulse
1ms
C
J
V
GS
= 0V
10ms
A
1
A
100
0.4
0.8
1.2
1.6
2.0
1
10
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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