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IS63LV1024L-10JLI 参数 Datasheet PDF下载

IS63LV1024L-10JLI图片预览
型号: IS63LV1024L-10JLI
PDF下载: 下载PDF文件 查看货源
内容描述: 128K ×8高速CMOS静态RAM 3.3V革命引脚 [128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT]
分类和应用: 存储内存集成电路静态存储器光电二极管
文件页数/大小: 18 页 / 615 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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IS63LV1024
IS63LV1024L
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE
Access Time
OE
Access Time
OE
to Low-Z Output
OE
to High-Z Output
CE
to Low-Z Output
CE
to High-Z Output
CE
to Power Up Time
CE
to Power Down Time
-8 ns
Min.
Max.
8
2
0
0
3
0
0
8
8
4
4
4
8
-10 ns
Min.
Max.
10
2
0
0
3
0
0
10
10
5
5
5
10
-12 ns
Min.
Max.
12
2
0
0
3
0
0
12
12
6
6
6
12
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
(2)
t
HZOE
(2)
t
LZCE
(2)
t
HZCE
(2)
t
PU
t
PD
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
loading specified in Figure 1.
2. Tested with the loading specified in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
317
Ω
Z
OUT
= 50
Ω
OUTPUT
50
Ω
V
T
= 1.5V
Figure 1
Figure 2
3.3V
OUTPUT
5 pF
Including
jig and
scope
351
Ω
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. I
1/26/07
5