LANSDALE Semiconductor, Inc.
ML145152
RECEIVER 2ND L.O.
30.720 MHz
REF. OSC.
15.360 MHz
NO CONNECTS
(ON–CHIP OSC.
OPTIONAL)
RECEIVER FIRST L.O.
825.030 844.980 MHz
X2
“1”
“1”
“1”
LOCK DETECT SIGNAL
R2
→
C
(30 kHz STEPS)
OSC
out
RA2
RA1
RA0
LD
R1
R1
φ
–
+
R
OSC
in
X4
NOTE 6
VCO
φ
V
ML145152
NOTE 5
NOTE 7
V
V
+ V
DD
R2
C
MC
SS
f
X4
TRANSMITTER
in
NOTE 6
MODULATION
N9
N0 A5
A0
ML12017
TRANSMITTER SIGNAL
825.030 844.980 MHz
(30 kHz STEPS)
÷
64/65 PRESCALER
CHANNEL PROGRAMMING
→
NOTE 6
NOTES:
1. Receiver 1st I.F. = 45 MHz, low side injection; Receiver 2nd I.F. = 11.7 MHz, low side injection.
2. Duplex operation with 45 MHz receiver/transmit separation.
3. f = 7.5 kHz; ÷ R = 2048.
R
total
4. N
= N 64 + A = 27501 to 28166; N = 429 to 440; A = 0 to 63.
5. ML145158 may be used where serial data entry is desired.
6. High frequency prescalers may be used for higher frequency VCO and f
implementations.
ref
7. The φ and φ outputs are fed to an external combiner/loop filter. See the Phase–Locked Loop — Low–Pass Filter Design page for
R
V
additional information. The φ and φ outputs swing rail–to–rail. Therefore, the user should be careful not to exceed the common mode
R
V
input range of the op amp used in the combiner/loop filter.
Figure 2. 666–Channel, Computer–Controlled, Mobile Radiotelephone Synthesizer
for 800 MHz Cellular Radio Systems
ML145152 Data Sheet Continued on Page 23
Page 8 of 35
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