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GAL16V8D-15LPI 参数 Datasheet PDF下载

GAL16V8D-15LPI图片预览
型号: GAL16V8D-15LPI
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能E2CMOS PLD通用阵列逻辑 [High Performance E2CMOS PLD Generic Array Logic]
分类和应用:
文件页数/大小: 22 页 / 315 K
品牌: LATTICE [ LATTICE SEMICONDUCTOR ]
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Specifications
GAL16V8
Simple Mode
In the Simple mode, macrocells are configured as dedicated inputs
or as dedicated, always active, combinatorial outputs.
Architecture configurations available in this mode are similar to the
common 10L8 and 12P6 devices with many permutations of ge-
neric output polarity or input choices.
All outputs in the simple mode have a maximum of eight product
terms that can control the logic. In addition, each output has pro-
grammable polarity.
Pins 1 and 11 are always available as data inputs into the AND
array. The center two macrocells (pins 15 & 16) cannot be used
as input or I/O pins, and are only available as dedicated outputs.
The JEDEC fuse numbers including the UES fuses and PTD fuses
are shown on the logic diagram.
Vcc
Combinatorial Output with Feedback Configuration
for Simple Mode
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=0 defines this configuration.
- All OLMC
except
pins 15 & 16 can be configured to
this function.
XOR
Combinatorial Output Configuration for Simple Mode
Vcc
XOR
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=0 defines this configuration.
- Pins 15 & 16 are permanently configured to this
function.
Dedicated Input Configuration for Simple Mode
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=1 defines this configuration.
- All OLMC
except
pins 15 & 16 can be configured to
this function.
Note: The development software configures all of the architecture control bits and checks for proper pin usage automatically.
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