Table 6. Logic Allocator for All ispMACH 4A Devices (except M4A(3,5)-32/32)
Output Macrocell
M
0
M
1
M
2
M
3
M
4
M
5
M
6
M
7
Available Clusters
C
0
, C
1
, C
2
C
0
, C
1
, C
2
, C
3
C
1
, C
2
, C
3
, C
4
C
2
, C
3
, C
4
, C
5
C
3
, C
4
, C
5
, C
6
C
4
, C
5
, C
6
, C
7
C
5
, C
6
, C
7
, C
8
C
6
, C
7
, C
8
, C
9
Output Macrocell
M
8
M
9
M
10
M
11
M
12
M
13
M
14
M
15
Available Clusters
C
7
, C
8
, C
9
, C
10
C
8
, C
9
, C
10
, C
11
C
9
, C
10
, C
11
, C
12
C
10
, C
11
, C
12
, C
13
C
11
, C
12
, C
13
, C
14
C
12
, C
13
, C
14
, C
15
C
13
, C
14
, C
15
C
14
, C
15
Table 7. Logic Allocator for M4A(3,5)-32/32
Output Macrocell
M
0
M
1
M
2
M
3
M
4
M
5
M
6
M
7
Available Clusters
C
0
, C
1
, C
2
C
0
, C
1
, C
2
, C
3
C
1
, C
2
, C
3
, C
4
C
2
, C
3
, C
4
, C
5
C
3
, C
4
, C
5
, C
6
C
4
, C
5
, C
6
, C
7
C
5
, C
6
, C
7
C
6
, C
7
From n-1
Output Macrocell
M
8
M
9
M
10
M
11
M
12
M
13
M
14
M
15
Available Clusters
C
8
, C
9
, C
10
C
8
, C
9
, C
10
, C
11
C
9
, C
10
, C
11
, C
12
C
10
, C
11
, C
12
, C
13
C
11
, C
12
, C
13
, C
14
C
12
, C
13
, C
14
, C
15
C
13
, C
14
, C
15
C
14
, C
15
To n-1
To n-2
Logic Allocator
Basic Product
Term Cluster
n
n
0 Default
To n+1
From n+1
From n+2
Extra
Product
Term
0 Default
Prog. Polarity
To Macrocell
n
17466G-005
a. Synchronous Mode
From n-1
To n-1
To n-2
Logic Allocator
Basic Product
Term Cluster
n
n
0 Default
Extra
Product
Term
0 Default
From n+1
From n+2
To n+1
Prog. Polarity
b. Asynchronous Mode
To Macrocell
n
17466G-006
Figure 2. Logic Allocator: Configuration of Cluster “n” Set by Mode of Macrocell “n”
8
ispMACH 4A Family
LATTICE [ LATTICE SEMICONDUCTOR ]
