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MACH220-12JC 参数 Datasheet PDF下载

MACH220-12JC图片预览
型号: MACH220-12JC
PDF下载: 下载PDF文件 查看货源
内容描述: 高密度EE CMOS可编程逻辑 [High-Density EE CMOS Programmable Logic]
分类和应用: 可编程逻辑器件输入元件时钟
文件页数/大小: 29 页 / 228 K
品牌: LATTICE [ LATTICE SEMICONDUCTOR ]
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SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges (Note 2)
(continued)
Parameter
Symbol Parameter Description
t
WIGL
t
PDLL
t
AR
t
ARW
t
ARR
t
AP
t
APW
t
APR
t
EA
t
ER
Input Latch Gate Width LOW
Input, I/O, or Feedback to Output Through Transparent
Input and Output Latches
Asynchronous Reset to Registered or Latched Output
Asynchronous Reset Width (Note 1)
Asynchronous Reset Recovery Time (Note 1)
Asynchronous Preset to Registered or Latched Output
Asynchronous Preset Width (Note 1)
Asynchronous Preset Recovery Time (Note 1)
Input, I/O, or Feedback to Output Enable (Note 3)
Input, I/O, or Feedback to Output Disable (Note 3)
12
8
12
12
12
8
16
15
10
15
15
-12
Min Max
6
16
16
15
10
20
20
15
20
20
-15
Min Max
6
19
20
20
15
25
-20
Min Max
8
24
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified
where capacitance may be affected.
2. See Switching Test Circuit for test conditions.
3. Parameters measured with 24 outputs switching.
MACH220-12/15/20 (Com’l)
13