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PALCE22V10H-5JC/5 参数 Datasheet PDF下载

PALCE22V10H-5JC/5图片预览
型号: PALCE22V10H-5JC/5
PDF下载: 下载PDF文件 查看货源
内容描述: 24引脚EE CMOS (零功耗)多功能PAL器件 [24-Pin EE CMOS (Zero Power) Versatile PAL Device]
分类和应用: 可编程逻辑器件输入元件时钟
文件页数/大小: 34 页 / 662 K
品牌: LATTICE [ LATTICE SEMICONDUCTOR ]
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most of its internal circuitry. The current will go to almost zero (I
CC
< 30 µA). The outputs will
maintain the states held before the device went into the standby mode.
When any input switches, the internal circuitry is fully enabled, and power consumption returns
to normal. This feature results in considerable power savings for operation at low to medium
frequencies. This saving is illustrated in the I
CC
vs. frequency graph.
Product-Term Disable
On a programmed PALCE22V10Z, any product terms that are not used are disabled. Power is cut
off from these product terms so that they do not draw current. As shown in the I
CC
vs. frequency
graph, product-term disabling results in considerable power savings. This saving is greater at the
higher frequencies.
Further hints on minimizing power consumption can be found in a separate document entitled,
Minimizing Power Consumption with Zero-Power PLDs
.
6
PALCE22V10 and PALCE22V10Z Families