LTC1062
APPLICATIO S I FOR ATIO
Divide By 1, 2, 4 (Pin 4)
By connecting Pin 4 to V
+
, to mid supplies or to V
–
, the
clock frequency driving the internal switched capacitor
network is the oscillator frequency divided by 1, 2, 4
respectively. Note that the f
CLK
/f
C
ratio of 100:1 is with
respect to the internal clock generator output frequency.
The internal divider is useful for applications where octave
tuning is required. The
÷2
threshold is typically
±1V
from
the mid supply voltage.
Transient Response
Figure 3 shows the LTC1062 response to a 1V input step.
Figure 3. Step Response to a 1V Peak Input Step
Table 2
NOISE BW
DC – 0.1 • f
C
DC – 0.25 • f
C
DC – 0.5 • f
C
DC – 1 • f
C
DC – 2 • f
C
RMS NOISE (V
S
=
±5V)
2µV
8µV
20µV
62µV
100µV
1062fd
U
Filter Noise
The filter wideband RMS noise is typically 100µV
RMS
for
±5V
supply and it is nearly independent from the value of
the cutoff frequency. For single 5V supply the RMS noise
is 80µV
RMS
. Sixty-two percent of the wideband noise is in
the passband, that is from DC to f
C
. The noise spectral
density, unlike conventional active filters, is nearly zero for
frequencies below 0.1 • f
C
. This is shown in the Typical
Performance Characteristics section. Table 2 shows the
LTC1062 RMS noise for different noise bandwidths.
200mV/VERT DIV
50ms/HORIZ DIV, f
C
= 10Hz
5ms/HORIZ DIV, f
C
= 100Hz
0.5ms/HORIZ DIV, f
C
= 1kHz
f
1
=
C
2πRC 1.62
W
U U
f
1
=
C
2πRC 1.94
f
1
=
C
2πRC 2.11
7
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