L8C201/202/203/204
DEVICES INCORPORATED
512/1K/2K/4K x 9-bit Asynchronous FIFO
F
IGURE
1. FIFO M
EMORY
(D
EPTH
E
XPANSION
) B
LOCK
D
IAGRAM
W
FF
XO
EF
9
9
R
Q
8-0
V
CC
D
8-0
L8C20X
XI
FL
XO
9
L8C20X
XI
FL
9
XO
FF
9
EF
9
L8C20X
XI
FL
RS
T
ABLE
1.
MODE
Reset
R
ESET AND
R
ETRANSMIT
(S
INGLE
D
EVICE
C
ONFIGURATION
/W
IDTH
E
XPANSION
M
ODE
)
INPUTS
RS
0
RT
X
0
INTERNAL STATUS
Write Pointer
Location Zero
Unchanged
Increment
EF
0
X
X
OUTPUTS
FF
1
X
X
HF
1
X
X
XI
0
Read Pointer
Retransmit
Read/Write
BS
1
0
1
1
0
INPUTS
RT
0
1
(2)
RS
0
0
1
XI
T
ABLE
2.
R
ESET AND
F
IRST
L
OAD
T
RUTH
T
ABLE
(D
EPTH
E
XPANSION
/C
OMPOUND
E
XPANSION
M
ODE
)
INTERNAL STATUS
Write Pointer
Location Zero
Location Zero Disabled
X
OUTPUTS
EF
0
0
X
FF
1
1
X
Read Pointer
O
MODE
Reset First Device
Reset All Others
Read/Write
(1)
(1)
(1)
(1) See Figure 1 (Depth Expansion Block Diagram)
(2) Unchanged
O
Location Zero
Location Zero
Increment
Location Zero
X
13
Location Zero Disabled
LE
FIFO Products
03/04/99–LDS.8C201/2/3/4-H
TE
FULL
FF
EF
EMPTY
LOGIC [ LOGIC DEVICES INCORPORATED ]
