®
LY611024
Rev. 1.6
128K X 8 BIT HIGH SPEED CMOS SRAM
DC ELECTRICAL CHARACTERISTICS
SYMBOL TEST CONDITION
PARAMETER
Supply Voltage
V
CC
*1
Input High Voltage
V
IH
*2
Input Low Voltage
V
IL
Input Leakage Current
V
CC
≧
V
IN
≧
V
SS
I
LI
Output Leakage
V
CC
≧
V
OUT
≧
V
SS,
I
LO
Current
Output Disabled
Output High Voltage
V
OH
I
OH
= -4mA
Output Low Voltage
V
OL
I
OL
= 8mA
Cycle time = Min.
Average Operating
CE# = V
IL
and CE2 = V
IH
,
I
CC
Power supply Current
I
I/O
= 0mA
Others at V
IL
or V
IH
CE# = V
IH
or CE2 = V
IL
I
SB
Others at V
IL
or V
IH
CE#
≧
V
CC
-0.2V
Standby Power
or CE2
≦
0.2V
Supply Current
I
SB1
CE#
≧
V
CC
-0.2V
or CE2
≦
0.2V
Others at 0.2V or V
CC
-0.2V
MIN.
4.5
2.4
- 0.5
-1
-1
2.4
-
- 12
- 15
-
-
-
Normal
LL
-
-
TYP.
5.0
-
-
-
-
-
-
50
40
3
1
2
*4
MAX.
5.5
V
CC
+0.5
0.8
1
1
-
0.4
80
65
20
5
50
UNIT
V
V
V
µA
µA
V
V
mA
mA
mA
mA
µA
Notes:
1. V
IH
(max) = V
CC
+ 3.0V for pulse width less than 10ns.
2. V
IL
(min) = V
SS
- 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at V
CC
= V
CC
(TYP.) and T
A
= 25℃
CAPACITANCE
(T
A
= 25
℃
, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to V
CC
- 0.2V
3ns
1.5V
C
L
= 30pF + 1TTL, I
OH
/I
OL
= -4mA/8mA
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
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