Design and Applications Information
Isolated Voltage Loop and Output Voltage Feedback on FB Pin
5.2.3
R
S2
and R
f1
Design
The R
S2
and R
f1
design is mainly based on the opto-couplers current transfer ratio(CTR) Which
should be around 100% to 200%. R
S2
is designed to produce around 1mA current at the LED side
of the opto-coupler. R
f1
is designed to produce 2.5V feedback voltage to close the loop under a
stead state. If R
f1
is designed at 1.24kΩ, the current at transistor side of the opto-coupler should be
designed at 2mA (typical). This should have enough signal to noise ratio in the practical design. The
feedback resistor (R
f1
) should be kept close to the opto-coupler to avoid noise in the layout.
The output of PFC Flyback has double line frequency ripple voltage. At the steady state operation
condition, the FB pin voltage transferred from secondary side also has this double line frequency
ripple voltage. The ripple voltage amplitude on the FB pin is determined by the output voltage ripple
amplitude and the gain from the output voltage to the FB pin (referred in the previous section
It is noticed that there is an attenuated
ripple appearing at the output of the amplifier with the minus phase shift from the output voltage
ripple. Therefore, the ratio of ripple voltage amplitude over the DC voltage value of FB pin is bigger
than the ratio of output ripple over DC output voltage. If the output ripple voltage is too big in certain
applications, the FB pin voltage peak value might trigger the internal FB OVP threshold, which is
about 7% on the top of the reference value. This will heavily distort the input current waveform and
disturb the stability of the system. In order to solve this issue, it is recommended to use a constant
offset voltage circuit, as show in
This circuit consists of a diode (Z
D1
), and two resistors
(R
f2
and R
f3
). This will provide a bias current from the bias winding so as to produce a bias voltage
on the FB pin. Therefore, the ripple voltage amplitude of the FB pin is decreased below the FB OVP
threshold. In the 90W reference design, the winding bias voltage provides 1mA (typical) offset
current to the FB pin and the ripple voltage amplitude on the FB pin can decrease to be around half
of that with this bias circuit. R
f2
can be calculated by equation (10), in which V
FB
is 2.5V reference
voltage.
If the cathode voltage V
ZD1
is 9.1V, R
f2
is calculated as 6.8kΩ⋅
V
ZD1
–
V
FB
--------------------------- = 1mA
-
R
f2
Figure 22: Bias Current for Offset Voltage on FB Pin
OCP SW SGND
ISNS
VIN
Equation (10)
V
Out
PGND
R
S4
C
S2
88EM8040
/8041
VDD
FB
Opto- Coupler
R
S2
C
S1
R
S5
V
ZD1
R
f3
C
V CC
Z
D1
C
VDD
R
f2
R
f1
C
vout
V
ref
+
R
S3
–
Copyright © 2009 Marvell
October 5, 2009, Preliminary
Document Classification: Proprietary
Doc. No. MV-S104983-01 Rev. A
Page 33
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
