+2.7V, Low-Power,
12-Bit Serial ADCs in 8-Pin SO
____________________________Typical Operating Characteristics (continued)
(V
DD
= 3.0V, REF = 2.5V, f
SCLK
= 2.1MHz, C
L
= 20pF, T
A
= +25°C, unless otherwise noted.)
INTEGRAL NONLINEARITY
vs. CODE
MAX1241-11A/NEW
MAX1240/MAX1241
FFT PLOT
MAX1241-TOC12A
0.6
0.4
0.2
INL (LSB)
0
-0.2
-0.4
-0.6
0
1024
2048
CODE
3072
20
0
-20
AMPLITUDE (dB)
-40
-60
-80
-100
-120
-140
0
f
AIN
= 10kHz, 2.5Vp-p
f
SAMPLE
= 73ksps
4096
18.75
FREQUENCY (kHz)
37.50
_______________________________________________________________________Pin Description
PIN
1
2
NAME
V
DD
AIN
FUNCTION
Positive Supply Voltage: 2.7V to 3.6V, (MAX1240); 2.7 to 5.25V (MAX1241)
Sampling Analog Input, 0V to V
REF
range
Three-Level Shutdown Input. Pulling
SHDN
low shuts the MAX1240/MAX1241 down to 15µA (max)
supply current. Both the MAX1240 and MAX1241 are fully operational with either
SHDN
high or float-
ing. For the MAX1240, pulling
SHDN
high enables the internal reference, and letting
SHDN
float dis-
ables the internal reference and allows for the use of an external reference.
Reference Voltage for Analog-to-Digital Conversion. Internal 2.5V reference output for MAX1240;
bypass with 4.7µF capacitor. External reference voltage input for MAX1241, or for MAX1240 with the
internal reference disabled. Bypass REF with a minimum of 0.1µF when using an external reference.
Analog and Digital Ground
Serial Data Output. Data changes state at SCLK’s falling edge. DOUT is high impedance when
CS
is
high.
Active-Low Chip Select initiates conversions on the falling edge. When
CS
is high, DOUT is high
impedance.
Serial Clock Input. SCLK clocks data out at rates up to 2.1MHz.
3
SHDN
4
5
6
7
8
REF
GND
DOUT
CS
SCLK
_______________________________________________________________________________________
7
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
