+2.7V, Low-Power,
12-Bit Serial ADCs in 8-Pin SO
Higher source impedances can be used if a 0.01µF
capacitor is connected to the analog input. Note that
the input capacitor forms an RC filter with the input
source impedance, limiting the ADC’s input signal
bandwidth.
down (see the section
Using
SHDN
to Reduce Supply
Current).
The internal reference is enabled by pulling the
SHDN
pin high. Letting
SHDN
float disables the internal
reference, which allows the use of an external reference,
as described in the
External Reference
section.
External Reference
The MAX1240/MAX1241 operate with an external refer-
ence at the REF pin. To use the MAX1240 with an
external reference, disable the internal reference by let-
ting
SHDN
float. Stay within the +1.0V to V
DD
voltage
range to achieve specified accuracy. The minimum
input impedance is 18kΩ for DC currents. During con-
version, the external reference must be able to deliver
up to 250µA of DC load current and have an output
impedance of 10Ω or less. The recommended mini-
mum value for the bypass capacitor is 0.1µF. If the ref-
erence has higher output impedance or is noisy,
bypass it close to the REF pin with a 4.7µF capacitor.
MAX1240/MAX1241
Input Bandwidth
The ADCs’ input tracking circuitry has a 2.25MHz small-
signal bandwidth, so it is possible to digitize high-
speed transient events and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. To avoid aliasing of
unwanted high-frequency signals into the frequency
band of interest, anti-alias filtering is recommended.
Analog Input Protection
Internal protection diodes, which clamp the analog
input to V
DD
and GND, allow the input to swing from
GND - 0.3V to V
DD
+ 0.3V without damage. However,
for accurate conversions near full scale, the input must
not exceed V
DD
by more than 50mV, or be lower than
GND by 50mV.
If the analog input exceeds 50mV beyond the sup-
plies, limit the input current to 2mA.
Internal Reference (MAX1240)
The MAX1240 has an on-chip voltage reference
trimmed to 2.5V. The internal reference output is con-
nected to REF and also drives the internal capacitive
DAC. The output can be used as a reference voltage
source for other components and can source up to
400µA. Bypass REF with a 4.7µF capacitor. Larger
capacitors increase wake-up time when exiting shut-
____________________Serial Interface
Initialization after Power-Up and
Starting a Conversion
When power is first applied, and if
SHDN
is not pulled
low, it takes the fully discharged 4.7µF reference
bypass capacitor up to 20ms to provide adequate
charge for specified accuracy. With an external refer-
ence, the internal reset time is 10µs after the power
supplies have stabilized. No conversions should be
performed during these times.
To start a conversion, pull
CS
low. At
CS’s
falling edge,
the T/H enters its hold mode and a conversion is initiat-
COMPLETE CONVERSION SEQUENCE
CS
t
WAKE
SHDN
DOUT
CONVERSION 0
POWERED UP
POWERED DOWN
CONVERSION 1
POWERED UP
Figure 5. Shutdown Sequence
_______________________________________________________________________________________
9
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