MX25L1635D
Table 2. Protected Area Sizes
Status bit
BP3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
BP2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
BP1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
BP0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
NO.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Protect Level
16Mbit block grouping
(none)
(1block, protected block 31th)
(2blocks, protected block 30th-31th)
(4blocks, protected block 28th-31th)
(8blocks, protected block 24th-31th)
(16blocks, protected block 16th-31th)
(32blocks, protected all)
(32blocks, protected all)
(32blocks, protected all)
(32blocks, protected all)
(16blocks, protected block 0th-15th)
(24blocks, protected block 0th-23th)
(28blocks, protected block 0th-27th)
(30blocks, protected block 0th-29th)
(31blocks, protected block 0th-30th)
(32blocks, protected all)
II. Additional 512-bit secured OTP
for unique identifier: to provide 512-bit one-time program area for setting device
unique serial number - Which may be set by factory or system customer. Please refer to table 3. 512-bit secured OTP
definition.
- Security register bit 0 indicates whether the chip is locked by factory or not.
- To program the 512-bit secured OTP by entering 512-bit secured OTP mode (with ENSO command), and going through
normal program procedure, and then exiting 512-bit secured OTP mode by writing EXSO command.
- Customer may lock-down the customer lockable secured OTP by writing WRSCUR(write security register) command
to set customer lock-down bit1 as "1". Please refer to table of "security register definition" for security register bit
definition and table of "512-bit secured OTP definition" for address range definition.
- Note: Once lock-down whatever by factory or customer, it cannot be changed any more. While in 512-bit secured OTP
mode, array access is not allowed.
Table 3. 512-bit Secured OTP Definition
Address range
xxxx00~xxxx0F
xxxx10~xxxx3F
Size
128-bit
384-bit
Standard
Factory Lock
ESN (electrical serial number)
N/A
Customer Lock
Determined by customer
P/N: PM1374
11
REV. 1.5, OCT. 01, 2008
MCNIX [ MACRONIX INTERNATIONAL ]
