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MX25L1635DMI-12G 参数 Datasheet PDF下载

MX25L1635DMI-12G图片预览
型号: MX25L1635DMI-12G
PDF下载: 下载PDF文件 查看货源
内容描述: 16M - BIT [ ×1 / ×2 / ×4 ] CMOS串行闪存 [16M-BIT [x 1/x 2/x 4] CMOS SERIAL FLASH]
分类和应用: 闪存存储内存集成电路光电二极管时钟
文件页数/大小: 50 页 / 728 K
品牌: MCNIX [ MACRONIX INTERNATIONAL ]
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MX25L1635D
COMMAND DESCRIPTION
Table 5. Command Set
CO M M A ND
(by te)
W RE N
(write
enable)
06 (hex )
W RDI
(write
dis able)
04 (hex )
RDID (read
RDS R (read W RS R
RE A D (read FA S T
identific ation) s tatus
(write s tatus data)
RE A D (fas t
regis ter)
regis ter)
read data)
9F (hex )
05 (hex )
01 (hex )
V alues
03 (hex )
A D1(A 23-
A 16)
A D2 (A 15-
A 8)
A D3 (A 7-
A 0)
n by tes
read out
until CS #
goes high
0B (hex )
A D1
A D2
A D3
Dum m y
s ets the
(W E L)
write
enable
latc h bit
res ets the
(W E L)
write
enable
latc h bit
outputs
JE DE C ID: 1-
by te
m anufac turer
ID & 2-by te
devic e ID
to read out
the values
of the
s tatus
regis ter
to write new
values to the
s tatus
regis ter
n by tes
read out
until CS #
goes high
n by tes
read out by
2 x I/O until
CS # goes
high
RE S (read
elec tronic
ID)
1s t by te
2nd by te
3rd by te
4th by te
5th by te
A c tion
2RE A D (2
x I/O read
c om m and)
Note1
B B (hex )
A DD(2)
A DD(2) &
Dum m y (2)
4RE A D (4
x I/O read
c om m and)
E B (hex )
A DD(4) &
Dum m y (4)
Dum m y (4)
n by tes
read out by
4 x I/O until
CS # goes
high
Releas e
Read
E nhanc ed
COM M A ND 4P P (quad
(by te)
page
program )
1s t by te
2nd by te
3rd by te
4th by te
A c tion
S E (s ec tor B E (bloc k CE (c hip P P (P age CP
eras e)
eras e)
eras e)
program ) (Continuou
s ly
program
m ode)
38 (hex )
20 (hex )
D8 (hex ) 60 or C7 02 (hex )
A D (hex )
(hex )
A D1
A D1
A D1
A D1
A D1
A D2
A D2
A D2
A D2
A D3
A D3
A D3
A D3
quad input to eras e
to eras e to eras e to
c ontinous ly
to program the
the
whole
program
program
s elec ted c hip
the
whole c hip,
the s elec ted s elec ted
page
s ec tor
bloc k
s elec ted
the
page
addres s is
autom atic al
ly inc reas e
DP (Deep
power
down)
B 9 (hex )
RDP
(Releas e
from deep
power
down)
A B (hex )
A B (hex )
x
x
x
to read out
1-by te
devic e ID
FF h (hex )
x
x
x
A ll thes e
c om m ands
FF h,00h,A A
h or 55h will
es c ape the
perform anc e
enhanc e
m ode.
enters
releas e
deep power from deep
down m ode power
down m ode
COMM AND REMS (read REMS2
REMS4
(byte)
electronic
(read ID for
(read ID for
manufacturer 2x I/O mode) 4x I/O mode)
& device ID)
1st byte
2nd byte
3rd byte
4th byte
Action
90 (hex)
x
x
ADD (Note 2)
output the
manufacturer
ID & device
ID
EF (hex)
x
x
ADD (Note 2)
output the
m anufacturer
ID & device
ID
DF (hex)
x
x
ADD (Note 2)
output the
m anufacturer
ID & device
ID
ENSO
(enter
secured
OTP)
B1 (hex)
EXSO (exit RDSCUR W RSCUR
secured
(read
(write
OTP)
security
security
register) register)
C1 (hex)
2B (hex)
2F (hex)
ESRY
(enable
SO to
output
RY/BY#)
70 (hex)
DSRY
(disable
SO to
output
RY/BY#)
80 (hex)
to enter
the 512-bit
secured
OTP
m ode
to exit the
512-bit
secured
OTP m ode
to read
value of
security
register
to set the
lock-down
bit as "1"
(once
lock-down,
cannot be
updated)
to enable
SO to
output
RY/BY#
during CP
m ode
to disable
SO to
output
RY/BY#
during CP
m ode
Note 1: The count base is 4-bit for ADD(2) and Dummy(2) because of 2 x I/O. And the MSB is on SI/SIO1 which is different from
1 x I/O condition.
Note 2: ADD=00H will output the manufacturer ID first and ADD=01H will output device ID first.
Note 3: It is not recommended to adopt any other code not in the command definition table, which will potentially enter the hidden
mode.
P/N: PM1374
14
REV. 1.5, OCT. 01, 2008