MX25U4035
MX25U8035
4M-BIT [x 1/x 2/x 4] 1.8V CMOS SERIAL FLASH
8M-BIT [x 1/x 2/x 4] 1.8V CMOS SERIAL FLASH
FEATURES
GENERAL
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Serial Peripheral Interface compatible -- Mode 0 and Mode 3
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4M: 4,194,304 x 1 bit structure or 2,097,152 x 2 bits (two I/O read mode) structure or 1,048,576 x 4 bits (four I/
O read mode) structure
8M: 8,388,608 x 1 bit structure or 4,194,304 x 2 bits (two I/O read mode) structure or 2,097,152 x 4 bits (four I/
O read mode) structure
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Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each
- Any Block can be erased individually
Single Power Supply Operation
- 1.65 to 2.0 volt for read, erase, and program operations
Latch-up protected to 100mA from -1V to Vcc +1V
PERFORMANCE
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High Performance
- Fast read
- 1 I/O: 40MHz with 8 dummy cycles (30pF+1TTL Load)
- 2 I/O: 40MHz with 4 dummy cycles (30pF+1TTL Load), equivalent to 80MHz
- 4 I/O: 33MHz with 6 dummy cycles (30pF+1TTL Load), equivalent to 132MHz
- Fast program time: 2ms(typ.) and 7ms(max.)/page (256-byte per page)
- Byte program time: 30us (typical)
- Continuously program mode (automatically increase address under word program mode)
- Fast erase time: 90ms (typ.)/sector (4K-byte per sector); 0.8s(typ.) /block (32K-byte per block); 1.5s(typ.) /block
(64K-byte per block); 7.5s(typ.) /chip for 4M; 15s(typ.) /chip for 8M
Low Power Consumption
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- Low active read current: 12mA(max.) at 40MHz, 6mA(max.) at 25MHz
- Low active erase/programming current: 22mA (max.)
- Low standby current: 5uA (max.)
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Deep Power Down: 5uA(max.)
Typical 100,000 erase/program cycles
10 years data retention
SOFTWARE FEATURES
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Input Data Format
- 1-byte Command code
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Advanced Security Features
- Block lock protection
The BP0-BP3 status bit defines the size of the area to be software protection against program and erase instruc-
tions
- Additional 512-bit secured OTP for unique identifier
Auto Erase and Auto Program Algorithm
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Automatically erases and verifies data at selected sector or block
Automatically programs and verifies data at selected page by an internal algorithm that automatically times the
program pulse widths (Any page to be programed should have page in the erased state first)
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Status Register Feature
Electronic Identification
JEDEC 1-byte manufacturer ID and 2-byte device ID
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P/N: PM1394
REV. 1.0, MAR. 09, 2009
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