MX25V8035MI-15G 参数 Datasheet PDF下载

MX25V4035

MX25V8035

DATA PROTECTION

The MX25V4035/MX25V8035 is designed to offer protection against accidental erasure or programming caused

by spurious system level signals that may exist during power transition. During power up the device automatically

resets the state machine at standby mode. In addition, with its control register architecture, alteration of the memory

contents only occurs after successful completion of specific command sequences.

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Valid command length checking: The command length will be checked whether it is at byte base and completed

on byte boundary.

Write Enable (WREN) command: WREN command is required to set the Write Enable Latch bit (WEL) before

other command to change data. The WEL bit will return to reset stage under following situation:

- Power-up

- Write Disable (WRDI) command completion

- Write Status Register (WRSR) command completion

- Page Program (PP) command completion

- Continuously Program mode (CP) instruction completion

- Sector Erase (SE) command completion

- Block Erase 32KB (BE32K) command completion

- Block Erase (BE) command completion

- Chip Erase (CE) command completion

Deep Power Down Mode: By entering deep power down mode, the flash device also is under protected from

writing all commands except Release from deep power down mode command (RDP) and Read Electronic Sig-

nature command (RES).

Advanced Security Features: there are some protection and securuity features which protect content from inad-

vertent write and hostile access.

I. Block lock protection

- The Software Protected Mode (SPM) use (BP3, BP2, BP1, BP0) bits to allow part of memory to be protected

as read only. The protected area definition is shown as table of "Protected Area Sizes", the protected areas are

more flexible which may protect various area by setting value of BP0-BP3 bits.

Please refer to table of "protected area sizes".

- The Hardware Proteced Mode (HPM) use WP#/SIO2 to protect the (BP3, BP2, BP1, BP0) bits and SRWD bit.

If the system goes into four I/O read mode, the feature of HPM will be disabled.

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P/N: PM1468

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REV. 0.01, FEB. 13, 2009