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MX29F200BMC-70 参数 Datasheet PDF下载

MX29F200BMC-70图片预览
型号: MX29F200BMC-70
PDF下载: 下载PDF文件 查看货源
内容描述: 2M- BIT [ 256Kx8 / 128Kx16 ] CMOS FLASH MEMORY [2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY]
分类和应用:
文件页数/大小: 46 页 / 720 K
品牌: Macronix [ MACRONIX INTERNATIONAL ]
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MX29F200T/B  
SET-UP AUTOMATIC CHIP/SECTOR ERASE  
COMMANDS  
READ/RESET COMMAND  
The read or reset operation is initiated by writing the  
read/reset command sequence into the command reg-  
ister. Microprocessor read cycles retrieve array data.  
The device remains enabled for reads until the com-  
mand register contents are altered.  
Chip erase is a six-bus cycle operation. There are two  
"unlock" write cycles. These are followed by writing the  
"set-up"command80H. Twomore "unlock"writecycles  
are then followed by the chip erase command 10H.  
If program-fail or erase-fail happen, the write of F0H will  
resetthedevicetoaborttheoperation. Avalidcommand  
must then be written to place the device in the desired  
state.  
The Automatic Chip Erase does not require the device  
to be entirely pre-programmed prior to executing the  
Automatic Chip Erase. Upon executing the Automatic  
Chip Erase, the device will automatically program and  
verify the entire memory for an all-zero data pattern.  
When the device is automatically verified to contain an  
all-zeropattern,aself-timedchiperaseandverifybegin.  
Theeraseandverifyoperationsarecompletedwhenthe  
data on Q7 is "1" at which time the device returns to the  
Read mode. The system does not require to provide  
any control or timing during these operations.  
SILICON-ID-READ COMMAND  
Flash memories are intended for use in applications  
where the local CPU alters memory contents. As such,  
manufacturer and device codes must be accessible  
while the device resides in the target system. PROM  
programmers typically access signature codes by rais-  
ing A9 to a high voltage. However, multiplexing high  
voltage onto address lines is not generally desired  
system design practice.  
When using the Automatic Chip Erase algorithm, note  
that the erase automatically terminates when adequate  
erasemarginhasbeenachievedforthememoryarray(no  
erase-verified command is required).  
The MX29F200T/B contains a Silicon-ID-Read opera-  
tiontosupplementtraditionalPROMprogrammingmeth-  
odology. The operation is initiated by writing the read  
silicon ID command sequence into the command regis-  
ter. Following the command write, a read cycle with  
A1=VIL,A0=VILretrievesthemanufacturercodeofC2H/  
00C2H. A read cycle with A1=VIL, A0=VIH returns the  
devicecodeof51H/2251HforMX29F200T,57H/2257H  
for MX29F200B.  
IftheEraseoperationwasunsuccessful, thedataonQ5  
is"1"(seeTable4),indicatinganeraseoperationexceed  
internal timing limit.  
Theautomaticerasebeginsontherisingedgeofthelast  
WE pulse in the command sequence and terminates  
when the data on Q7 is "1" and the data on Q6 stops  
toggling for two consecutive read cycles, at which time  
the device returns to the Read mode.  
TABLE 3. EXPANDED SILICON ID CODE  
Pins  
A0  
A1  
Q15~Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Code(Hex) Code  
Manufacture code  
Word  
Byte  
Word  
Byte  
VIL VIL  
VIL VIL  
VIH VIL  
VIH VIL  
VIH VIL  
VIH VIL  
00H  
X
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
1
0
00C2H  
C2H  
Device code  
22H  
X
2251H  
for MX29F200T  
Device code  
51H  
Word  
Byte  
22H  
X
2257H  
for MX29F200B  
Sector Portection  
Verification  
57H  
X
X
VIH  
VIH  
X
01H(Protected)  
00H(Unprotected)  
X
P/N:PM0549  
REV. 1.3 , DEC. 24, 2001  
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