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MX29L1611TC-12 参数 Datasheet PDF下载

MX29L1611TC-12图片预览
型号: MX29L1611TC-12
PDF下载: 下载PDF文件 查看货源
内容描述: 16M - BIT [ 2M ×8 / 1M ×16 ]的CMOS单电压PAGEMODE FLASH EEPROM [16M-BIT [2M x 8/1M x 16] CMOS SINGLE VOLTAGE PAGEMODE FLASH EEPROM]
分类和应用: 闪存存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 39 页 / 659 K
品牌: MCNIX [ MACRONIX INTERNATIONAL ]
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MX29L1611
SECTOR UNPROTECT
It is also possible to unprotect the sector , same as the
first five write command cycles in activating sector
protection mode followed by the Unprotect Sector
command -40H, the automatic Unprotect operation
begins on the rising edge of the last WE pulse in the
command sequence and terminates when the Status on
DQ7 is '1' at which time the device stays at the read
status register mode. (Refer to table 3,6 and Figure
11,12)
The device remains enabled for read status register
mode until the CIR contents are altered by a valid
command sequence.
Either Protect or Unprotect sector mode is accomplished
by keeping WP high, i.e. protect-bit status can only be
changed with a valid command sequence and WP at
high. When WP is high, all sectors can be programmed
or erased regardless of the state of the protect-bits.
Protect-bit status will not be changed during chip/sector
erase operations. With WP at VIL, only unprotected
sectors can be programmed or erased.
HARDWARE SECTOR PROTECTION
The MX29L1611 features sector protection. This feature
will disable both program and erase operations in either
the top or the bottom sector (0 or 31). The sector
protection feature is enabled using system software by
the user(Refer to table 3). The device is shipped with
both sectors unprotected. Alternatively, MXIC may
protect sectors in the factory prior to shipping the device.
SECTOR PROTECTION
To activate this mode, a six-bus cycle operation is
required. There are two 'unlock' write cycles. These are
followed by writing the 'set-up' command. Two more
'unlock' write cycles are then followed by the Lock Sector
command - 20H. Sector address is latched on the falling
edge of CE or WE of the sixth cycle of the command
sequence. The automatic Lock operation begins on the
rising edge of the last WE pulse in the command sequence
and terminates when the Status on DQ7 is '1' at which
time the device stays at the read status register mode.
The device remains enabled for read status register
mode until the CIR contents are altered by a valid
command sequence (Refer to table 3,6 and Figure
10,12 ).
ABORT MODE
To activate Abort mode, a three-bus cycle operation is
required. The E0H command (Refer to table 3) only
stops Page program or Sector /Chip erase operation
currently in progress and puts the device in Abort mode.
So the program or erase operation will not be completed.
Since the data in some page/sectors is no longer valid
due to an incomplete program or erase operation, the
program fail (DQ4) or erase fail (DQ5)bit will be set.
A read array command MUST be written to bring the
device out of the abort state without incurring any wake
up latency. Note that once device is brought out, Clear
status register mode is required before a program or
erase operation can be executed.
VERIFY SECTOR PROTECT
To verify the Protect status of the Top and the Bottom
sector, operation is initiated by writing Silicon ID read
command into the command register. Following the
command write, a read cycle from address XXX0H
retrieves the Manufacturer code of C2H. A read cycle
from XXX1H returns the Device code F8H. A read cycle
from appropriate address returns information as to which
sectors are protected. To terminate the operation, it is
necessary to write the read/reset command sequence
into the CIR.
(Refer to table 3,4 and Figure 12)
A few retries are required if Protect status can not be
verified successfully after each operation.
P/N:PM0511
REV. 2.4, NOV. 06, 2001
13