MX93002FC 参数 Datasheet PDF下载

MX93002

. 3-Channel Input (MIC,AUX1,LIN) with PRE-PGA (Pre-Programmable Gain Control)

. Input Range : 0 ~ AVDD-2Vpp;

.

PRE-PGA

gain step from 21dB to -15dB (21, 18, 15, 12, 9, 7.5, 6, 4.5, 3, 0, -3, -6, -9, -12, -15dB);

. Driving Capacity : more than 400uA at

FILT

and

AUX2

output;

. Input Impedance : more than 25KΩ;

. THD : less than 70dB at

FILT

output;

. There is just one path which can be selected at the same time;

. The gain setting of the path will be mapped to the

PRE-PGA

when user changes the path of Input.

. ALC (Automatic Level Control)

VOUT ( mVpp )

. Input Range : 0 ~ 1.2Vpp (Loop Gain : 40dB);

. Output Characteristic : see

FIG. 5

~

FIG. 7;

. Loop Gain : 42dB max (with external RC time constant);

. Driving Capacity : more than 400uA at

FILT

and

AUX2

output;

. THD : less than 40dB at

FILT

output (Loop Gain : 40dB).

3000mVpp

1000mVpp

10mVpp

1200mVpp

VIN ( mVpp )

. AD1 PGA

. Input Range : 0 ~ AVDD-2Vpp;

.

AD1-PGA

can support gain step from 0dB to 18dB (0, 4, 8, 18dB);

. AD2 PGA

. Input Range : 0 ~ AVDD-2Vpp;

.

AD2-PGA

can support gain step from -6dB to 39dB (-6, -3, 0, 3, 6, 9, 12, 15, 18, 21, 24, 27, 30, 33, 36, 39dB);

. FILT as I/O Port

. Input Range : 0 ~ AVDD-2Vpp;

. Input Impedance : more than 1KΩ;

. Output Impedance : less than 1KΩ;

. Load Capacitance : 5000pF;

. AUX1 & AUX2 as I/O Port

. Input Range : 0 ~ AVDD-2Vpp;

. Input Impedance : more than 15KΩ;

. Output Impedance : less than 15KΩ;

. External passive L.P.F. (Low Pass Filter)

. External capacitors (LPFC1 and

LPFC2)

can be changed to attenuate high frequency noise at

SPKP

and

SPKN

output;

. When external capacitors (LPFC1 and

LPFC2)

are NC (no connection), then passive

L.P.F.

will be by-passed;

. Output of the Line Driver (LOUTP and

LOUTN)

can be chosen to pass or by-pass the

L.P.F.;

.

LPFC1/LPFC2

can be a D/A output pin and output impedance is around 3KΩ/6KΩ;

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