1Gb: x4, x8, x16 DDR3 SDRAM
Operations
Figure 101: Power-Down Entry After READ or READ with Auto Precharge (RDAP)
CK#
CK
READ/
RDAP
T0
T1
Ta0
Ta1
Ta2
Ta3
Ta4
Ta5
Ta6
Ta7
Ta8
Ta9
Ta10
Ta11
Ta12
Command
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
tIS
t
CPDED
NOP
CKE
Address
Valid
RL = AL +
CL
tPD
DQS, DQS#
DQ BL8
DI
n
DI
DI
n
+1
n
+2
DI
n
+3
DI
n
+4
DI
n+
5
DI
n
+
6
DI
n
+7
DQ BC4
DI
n
DI
n
+1
DI
n
+2
DI
n
+3
tRDPDEN
Power-down or
self refresh entry
Indicates A Break In
Time
Scale
Transitioning Data
Don’t
Care
Figure 102: Power-Down Entry After WRITE
CK#
CK
T0
T1
Ta0
Ta1
Ta2
Ta3
Ta4
Ta5
Ta6
Ta7
Tb0
Tb1
Tb2
Tb3
Tb4
Command
WRITE
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
tIS
t
CPDED
NOP
CKE
Address
Valid
WL = AL +
CWL
tWR
tPD
DQS, DQS#
DQ BL8
DI
n
DI
DI
n
+1
n
+2
DI
n
+3
DI
n
+4
DI
n
+5
DI
n
+
6
DI
n
+7
DQ BC4
DI
n
DI
n
+1
DI
n
+2
DI
n
+3
tWRPDEN
Power-down or
self refresh entry1
Indicates A Break in
Time
Scale
Transitioning Data
Don’t
Care
Notes:
1. CKE can go LOW 2
t
CK earlier if BC4MRS.
PDF: 09005aef826aa906/Source: 09005aef82a357c3
1Gb_DDR3_4.fm - Rev. D 8/1/08 EN
154
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