MDT10F630
5. Order Information
ROM
(Words)
1.0K
1.0K
1.0K
1.0K
RAM EEPROM
(Bytes) (Bytes)
64
64
64
64
128
128
128
128
Timer
Package
(8/16 bit)
1/1
1/1
1/1
1/1
14-DIP
14-DIP
14-SOP
14-SOP
Device
MDT10F630P11
MDT10F630P13
MDT10F630S11
MDT10F630S13
I/O
12
11
12
11
Comparators
1
1
1
1
Remark
Pin 4 is PA3
function
Pin 4 is /MCLR
external reset
function
Pin 4 is PA3
function
Pin 4 is /MCLR
external reset
function
6. Block Diagram
EEPROM
128×8
Stack Eight
Levels
8 bits
Flash ROM
1024 ×14
10 bits
Comparator
RAM
64 ×8
PA3
14 bits
Program
Counters
Instruction
Register
Special
Register
Port A
PA0~PA2
PA4~PA5
5 bits
Port C
Instruction
Decoder
Data
8bit
PC0~PC5
6 bits
Oscillator
circuit
Control
Circuit
D0~D7
TMR0
8 Bits
TMR1
16 Bits
Power on Reset
Power Down Reset
Watchdog Timer
Working Register
ALU
Status Register
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw
P.2
2008/4
Ver. 1.0
MDTIC [ Micon Design Technology Corporation ]
