MDT10P157
9. Instruction Set
Mnemonic
Operands
010000 00000000 NOP
Instruction Code
010000 00000001 CLRWT
010000 00000010 SLEEP
010000 00000011 TMODE
010000 00000100 RET
010000 00000rrr
010001 1rrrrrrr
011000 trrrrrrr
111010 iiiiiiii
010111 trrrrrrr
011001 trrrrrrr
011010 trrrrrrr
011011 trrrrrrr
011100 trrrrrrr
011101 trrrrrrr
011110 trrrrrrr
010010 trrrrrrr
110100 iiiiiiii
010011 trrrrrrr
110101 iiiiiiii
010100 trrrrrrr
110110 iiiiiiii
011111 trrrrrrr
010110 trrrrrrr
010101 trrrrrrr
010000 1xxxxxxx
010001 0rrrrrrr
0000bb brrrrrrr
0010bb brrrrrrr
CPIO
STWR
LDWI I
R
R
Function
No operation
Clear Watchdog timer
Sleep mode
Return
Control I/O port register
Store W to register
Load register
Load immediate to W
Operating
None
0→WT
0→WT,stop OSC
Stack→PC
W→CPIO
W→R
R→t
I→W
[R(0~3)
↔
R(4~7)]→t
R + 1→t
R + 1→t
W + R→t
R
﹣W→t
(R+/W+1→t)
R
﹣1→t
R
﹣1→t
R
∩
W→t
I
∩
W→W
R
∪
W→t
R
♁
W→t
/R→t
R(n)→R(n-1)，
C→R(7) R(0)→C
R(n)→(n+1)，
C→R(0) R(7)→C
0→W
0→R
0→R(b)
1→R(b)
r
TF, PF
TF, PF
None
None
None
None
Z
None
None
Z
None
C，HC，
Z
C，HC，
Z
Z
None
Z
Z
Z
Z
Z
Z
Z
C
C
Z
Z
None
None
Status
Load W to TMODE register W→TMODE
LDR R， t
SWAPR R，t Swap halves register
INCR R，t
INCRSZ R，
ADDWR R，t
SUBWR R，t
DECR R，t
DECRSZ R，t
Increment register
Increment register，skip if
zero
Add W and register
Subtract W from register
Decrement register
Decrement register，
skip if zero
ANDWR R，t AND W and register
ANDWI I
IORWR R，t
IORWI I
XORWI I
COMR R，t
RRR R，t
RLR R，t
CLRW
CLRR
R
BCR R， b
BSR R， b
AND W and immediate
Inclu. OR W and register
Inclu. OR W and immediate I
∪
W→W
Exclu. OR W and immediate I
♁
W→W
Complement register
Rotate right register
Rotate left register
Clear working register
Clear register
Bit clear
Bit set
XORWR R，t Exclu. OR W and register
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P.9
2010/06 VER 1.0
MDTIC [ Micon Design Technology Corporation ]
