MDT10P22(DF)
5. Block Diagram
S ta ck Two Le ve ls
EP RO M
1Kx14 (MDT10P 22)
RAM
72x8
P ort B
P ort
P B0~P B7
8 bits
10 bits
10 bits
P rogra m Counte rs
Ins truction
Re gis te r
14 bits
S pe cia l Re gis te r
O S C2
OS C1
MCLR
D0~D7
P ort A
Ins truction
De code r
P ort
P A0~P A7
(22,24 pins )
P A0~P A5
(20 pins )
P A0~P A3
(18 pins )
8 bits
Os cilla tor Circuit
Control Circuit
CMR0~C
MR5
Com pa ra t
or m ode
Re gis te r
P owe r on Re s e t
P owe r Down Re s e t
Working Re gis te r
ALU
Da ta
8-bit
S ta tus Re gis te r
8-bit Tim e r/Counte r
P re s ca le
WDT/OS T
Tim e r
RTCC
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 3
2007/8
Ver. 1.6
MDTIC [ Micon Design Technology Corporation ]
