MDT10P7212
(27) PIEB1: R8C
Bit
0
Symbol
TMR1IE
TMR1 interrupt enable bit
0: Disable TMR1 interrupt
1: Enable TMR1 interrupt
1
TMR2IE
TMR2 interrupt enable bit
0: Disable TMR2 interrupt
1: Enable TMR2 interrupt
2
CCP1IE
CCP1 interrupt enable bit
0: Disable CCP1 interrupt
1: Enable CCP1 interrupt
5~3
6
--
ADIE
Unimplemented, read as ‘0’
A/D interrupt enable bit
0: Disable A/D interrupt
1: Enable A/D interrupt
7
--
Unimplemented, read as ‘0’
Function
(28) PSTA: R8E
Bit
0
1
7~2
Symbol
PRDB
PORB
--
Function
0: Power range-detector Reset occurred
1: No Power range-detector Reset Occurred
0: Power on Reset occurred
1: No Power on Reset occurred
Unimplemented, read as ‘0’
(29) T2PER: R92
Timer2 period
(30) ADRESL: R9E
A/D result register low byte, The ADRESL register is not a writable register.
(31) ADS1 ( A/D Status Register ): R9F
Bit
Symbol
Function
0 0 0: PA0~3, PA5, PE0~2 = analog input, VREF = VDD
0 0 1: PA0~2, PA5, PE0~2 = analog input, VREF = PA3
0 1 0: PA0~3, PA5 = analog input, PE0~2 = digital I/O, VREF = VDD
0 1 1: PA0~2, PA5 = analog input, PE0~2 = digital I/O, VREF = PA3
1 0 0: PA0, 1, 3 = analog input, PA2, 5, PE0~2 = digital I/O, VREF = VDD
1 0 1: PA0, 1 = analog input, PA2, 5, PE0~2 = digital I/O, VREF = PA3
1 1 x: PA0~3, 5, PE0~2 = digital I/O
6~3
--
Unimplemented, read as ‘0’
2~0
PAVM2~0
This specification are subject to be changed without notice. Any latest information
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P. 10
2007/11 VER1.2
MDTIC [ Micon Design Technology Corporation ]
