MDT10P7212
(20) CCP1CTL: R17
Bit
3~0
Symbol
CCP1M3
~
CCP1M0
0 0 0 0: CCP1 off
0 1 0 0: Capture1 mode, every falling edge
0 1 0 1: Capture1 mode, every rising edge
0 1 1 0: Capture1 mode, every 4
th
rising edge
0 1 1 1: Capture1 mode, every 16
th
rising edge
1 0 0 0: Compare1 mode, set output on match
1 0 0 1: Compare1 mode, clear output on match
1 0 1 0: Compare1 mode, generate software interrupt on match
1 0 1 1: Compare1 mode, trigger special event
1 1 x x: PWM1 mode
5~4
7~6
PWM1LSB These bits are the two LSBs of the PWM1 duty cycle
--
Unimplemented, read as ‘0’
Function
(21) ADRESH: R1E
A/D result register high byte, The ADRESH register is not a writable register.
(22) ADS0 ( A/D Status Register ): R1F
Bit
0
Symbol
ADRUN
Function
0: A/D converter module is shut off and consumes no operating current
1: A/D converter module is operating
1
2
--
Unimplemented, read as ‘0’
GO/DONEB 0: A/D conversion not in progress
1: A/D conversion in progress
5~3
CHS2~0
000: AIC0 001: AIC1 010: AIC2 011: AIC3 100: AIC4
101: AIC5 110: AIC6 111: AIC7
7~6
ASCS1~0
00: fosc/2 01: fosc/8 10: fosc/32 11: f RC (*Note)
*Note: determined by OSC mode, HF: fosc/32, XT: fosc/8, RC: fosc/2, LF: fosc/2
This specification are subject to be changed without notice. Any latest information
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P. 8
2007/11 VER1.2
MDTIC [ Micon Design Technology Corporation ]
