MDT10P7301
4. Pin Assignment
/MCLR
PA0/AIC0
PA1/AIC1
PA2/AIC2
PA3/AIC3/Vref
PA4/T0CKI
PA5/SS/AIC4
VSS
OSC1/CLKIN
OSC2/CLKOUT
PC0/T1OSO/T1CKI
PC1/T1OSI
PC2/CCP
PC3/SCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0/INT
VDD
VSS
PC7
PC6
PC5/SDO
PC4/SDI
MDT10P7301K11(SKINNY)
MDT10P7301S11(SOP)
MDT10P7301SS11(SSOP)
5. Order Information
Device
MDT10P7301K11
MDT10P7301S11
MDT10P7301SS11
ROM
(Words)
4K
4K
4K
RAM
(Bytes)
192
192
192
I/O
22
22
22
A/D
(10 bits)
5-channel
5-channel
5-channel
Timer
(8/16)
2/1
2/1
2/1
CCP
2
2
2
SCM/
USART
YES/YES
YES/YES
YES/YES
Package
SKINNY
SOP
SSOP
6. Pin Function Description
Pin Name
PA0~PA3, PA5
PA4
PB0~PB7
I/O
I/O
I/O
I/O
Function Description
Port A, TTL input level / Analog input channel
PA4, Schmitt Trigger input levels, Open drain output
Port B, TTL input level / PB0: External interrupt input
PB4~PB7: Interrupt on pin change
PC0~PC7
/MCLR
OSC1/CLKIN
OSC2/CLKOUT
I/O
I
I
O
Port C, Schmitt Trigger input levels
Master Clear, Schmitt Trigger input levels
Oscillator Input / external clock input
Oscillator Output / in RC mode, the CLKOUT pin has 1/4
frequency of CLKIN
VDD
VSS
Power supply
Ground
This specification are subject to be changed without notice. Any latest information
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P. 2
2008/06 Ver. 1.2
MDTIC [ Micon Design Technology Corporation ]
