TH3122
K-Bus Transceiver with integrated Voltage Regulator
Functional Description
The TH3122 consists of a voltage regulator 5V/100mA
and a K-Bus transceiver, which is a bi-directional bus
interface device for data transfer between K-Bus and the
K-Bus protocol controller.
to Wake-up
Logic
Also integrated into the transceiver are a voltage and
time controlled reset management, power down, wake
up function and a universal comparator for extended
applications.
t
debWake
t
debBUS
RxD
POR
VBAT
POR
VCC
Control-
logic
Bit-Compare
Constant-Low
V
thH
V
thL
VCC
pnp-
Control
- slew rate
- I
B
- foldback
BUS
TxD
ESD
VCC
OSC
Vref
Biasing
SENSE
ESD
Figure 2 - Block Diagram K-Bus Transceiver
K-BUS Interface
The BUS Interface builds the connection between the
serial 5V bus line of the protocol controller and the 12V
K-Bus line.
The transceiver consists of a pnp-driver with slew rate
control and fold-back characteristic and contains also in
the receiver a high voltage comparator followed by a
debouncing unit.
electromagnetic emission of the bus line, the TH3122
has an integrated slew rate control.
Receive Mode
The data at the pin BUS will be transferred to the pin
RxD. Short spikes on the bus signal are suppressed by
the implemented debouncing circuit.
BUS
Transmit Mode
During the transmission the data at the pin TxD will be
transferred to the pin BUS. To minimize the
< t
debH
< t
debL
SEN/STA
RxD
t
debH
t
debL
TxD
Figure 4 - Receive Mode Pulse Diagram
BUS
Figure 3 - Transmit Mode Pulse Diagram
3901003122
Rev 004
Page 3
Dec/04
MELEXIS [ Melexis Microelectronic Systems ]
