欢迎访问ic37.com |
会员登录 免费注册
发布采购

ML6695CQ 参数 Datasheet PDF下载

ML6695CQ图片预览
型号: ML6695CQ
PDF下载: 下载PDF文件 查看货源
内容描述: 100BASE -X光纤物理层5 - bit接口 [100BASE-X Fiber Physical Layer With 5-bit Interface]
分类和应用: 光纤
文件页数/大小: 8 页 / 219 K
品牌: MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
 浏览型号ML6695CQ的Datasheet PDF文件第1页浏览型号ML6695CQ的Datasheet PDF文件第2页浏览型号ML6695CQ的Datasheet PDF文件第3页浏览型号ML6695CQ的Datasheet PDF文件第4页浏览型号ML6695CQ的Datasheet PDF文件第5页浏览型号ML6695CQ的Datasheet PDF文件第6页浏览型号ML6695CQ的Datasheet PDF文件第8页  
ML6695
FUNCTIONAL DESCRIPTION
TRANSMIT SECTION
The ML6695 transmit section accepts parallel NRZ data
nibbles, creates a serial NRZI data stream using the
internal 125MHz clock multiplier, and provides an open-
collector output IOUT to directly drive an LED.
IOUT
must be connected to V
CC
through a 15W resistor. The
internal clock multiplier accepts an external 25MHz
clock input.
The LED driver at IOUT is a current mode switch which
develops the output light by sinking current through the
network LED into IOUT. RTSET'S value determines the
output current:
DC offset correction. The quantizer output drives a data
comparator with a controlled slicing threshold. The
comparator provides a large-amplitude receive signal. The
clock recovery circuit extracts 125MHz receive clock
from the large-amplitude signal, and provides the clock
for the parallel data output registers. Received NRZ data
nibbles appear at the RSM outputs synchronously with
RXC falling edges. Received signals exceeding the preset
signal detect amplitude threshold for more than 5µs cause
the SDO output to go high. Received signals that fall
below the preset threshold for more than 5µs cause SDO
to go low.
OTHER MODES
The ML6695 will enter a power down mode when the
PWRDN
pin is tied low. In this state the ML6695 powers
down to a low-current (less than 20mA), inoperative state.
Driving it high enables normal operation of the ML6695.
Loopback mode is entered when the
LPBK
is tied to
ground. In this mode, the data at TSM0-4 are serialized,
then sent to the quantizer, followed by the receive PLL for
clock recovery, and finally to the RSM0-4 outputs. Tying
LPBK
to V
CC
places the ML6695 in its normal mode of
operation.
.

125V

´
140
W
RTSET
=


IOUT

where IOUT is the desired output current.
RECEIVE SECTION
(1)
The ML6695 receive section includes a fiber optic
quantizer and a 125MHz receive clock recovery circuit.
The quantizer is a wide-bandwidth limiting amplifier with
15Ω
38
IOUT
15Ω
39
IOUT
ML6695
Figure 1. Test Load
7