PIC16C63A/65B/73B/74B
FIGURE 4-2:
REGISTER FILE MAP
4.2.2
SPECIAL FUNCTION REGISTERS
File
File
The Special Function Registers are registers used by
the CPU and Peripheral Modules for controlling the
desired operation of the device. These registers are
implemented as static RAM.
Address
Address
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
INDF(1)
INDF(1)
OPTION_REG 81h
80h
TMR0
PCL
The Special Function Registers can be classified into
two sets (core and peripheral). Those registers associ-
ated with the “core” functions are described in this sec-
tion, and those related to the operation of the peripheral
features are described in the section of that peripheral
feature.
PCL
STATUS
FSR
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
STATUS
FSR
PORTA
PORTB
PORTC
PORTD(2)
PORTE(2)
PCLATH
INTCON
PIR1
TRISA
TRISB
TRISC
TRISD(2)
TRISE(2)
PCLATH
INTCON
PIE1
PIR2
PIE2
TMR1L
TMR1H
T1CON
TMR2
PCON
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
PR2
SSPADD
SSPSTAT
17h CCP1CON
18h
19h
1Ah
1Bh
1Ch
RCSTA
TXREG
RCREG
CCPR2L
CCPR2H
TXSTA
SPBRG
1Dh CCP2CON
ADRES(3)
1Eh
ADCON0(3)
1Fh
20h
ADCON1(3)
General
Purpose
Register
General
Purpose
Register
FFh
7Fh
Bank 0
Bank 1
Unimplemented data memory locations, read as ’0’.
Note 1: Not a physical register.
2: These registers are not implemented on the
PIC16C63A/73B, read as '0'.
3: These registers are not implemented on the
PIC16C63A/65B, read as '0'.
DS30605C-page 16
2000 Microchip Technology Inc.