PIC18F6390/6490/8390/8490
FIGURE 17-7:
SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
RX2/DT2 pin
bit 0
bit 2
bit 1
bit 6
bit 7
TX2/CK2 pin
Write to
TXREG2 Reg
TX2IF bit
TRMT bit
TXEN bit
TABLE 17-6: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
Reset
Values
on Page
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
PIR3
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
TX2IF
TX2IE
TX2IP
CREN
RBIE
—
TMR0IF
—
INT0IF
—
RBIF
—
59
61
61
61
63
63
63
63
—
—
LCDIF
LCDIE
LCDIP
RX9
RC2IF
RC2IE
RC2IP
SREN
PIE3
—
—
—
—
IPR3
—
—
—
—
—
RCSTA2
TXREG2
TXSTA2
SPBRG2
SPEN
ADDEN
FERR
OERR
RX9D
AUSART2 Transmit Register
CSRC TX9 TXEN
SYNC
—
BRGH
TRMT
TX9D
AUSART2 Baud Rate Generator Register
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master transmission.
© 2007 Microchip Technology Inc.
DS39629C-page 227
MICROCHIP [ MICROCHIP ]
