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MT41J128M8 参数 Datasheet PDF下载

MT41J128M8图片预览
型号: MT41J128M8
PDF下载: 下载PDF文件 查看货源
内容描述: DDR3 SDRAM MT41J256M4 â ????梅格32 ×4× 8银行MT41J128M8 â ????梅格16 ×8× 8银行MT41J64M16 â ???? 8梅格×16× 8银行 [DDR3 SDRAM MT41J256M4 – 32 Meg x 4 x 8 banks MT41J128M8 – 16 Meg x 8 x 8 banks MT41J64M16 – 8 Meg x 16 x 8 banks]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 214 页 / 2938 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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1Gb: x4, x8, x16 DDR3 SDRAM
Features
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DDR3-1066 Speed Bins ................................................................................................................... 74
DDR3-1333 Speed Bins ................................................................................................................... 75
DDR3-1600 Speed Bins ................................................................................................................... 76
DDR3-1866 Speed Bins ................................................................................................................... 77
DDR3-2133 Speed Bins ................................................................................................................... 78
Electrical Characteristics and AC Operating Conditions .................................................................... 79
Electrical Characteristics and AC Operating Conditions for Speed Extensions .................................... 89
Command and Address Setup and Hold Values Referenced – AC/DC-Based ...................................... 99
Derating Values for
t
IS/
t
IH – AC175/DC100-Based ........................................................................... 100
Derating Values for
t
IS/
t
IH – AC150/DC100-Based ........................................................................... 100
Derating Values for
t
IS/
t
IH – AC135/DC100-Based ........................................................................... 101
Derating Values for
t
IS/
t
IH – AC125/DC100-Based ........................................................................... 101
Minimum Required Time
t
VAC Above V
IH(AC)
or Below V
IL(AC)
for Valid Transition .............................. 102
DDR3 Data Setup and Hold Values at 1 V/ns (DQS, DQS# at 2 V/ns) – AC/DC-Based ......................... 107
Derating Values for
t
DS/
t
DH – AC175/DC100-Based ........................................................................ 108
Derating Values for
t
DS/
t
DH – AC150/DC100-Based ........................................................................ 108
Derating Values for
t
DS/
t
DH – AC135/DC100-Based at 1V/ns ........................................................... 109
Derating Values for
t
DS/
t
DH – AC135/DC100-Based at 2V/ns ........................................................... 110
Required Minimum Time
t
VAC Above V
IH(AC)
(Below V
IL(AC)
) for Valid DQ Transition ......................... 111
Truth Table – Command ................................................................................................................. 116
Truth Table – CKE .......................................................................................................................... 118
READ Command Summary ............................................................................................................ 120
WRITE Command Summary .......................................................................................................... 120
READ Electrical Characteristics, DLL Disable Mode ......................................................................... 126
Write Leveling Matrix ..................................................................................................................... 130
Burst Order .................................................................................................................................... 139
MPR Functional Description of MR3 Bits ........................................................................................ 148
MPR Readouts and Burst Order Bit Mapping ................................................................................... 149
Self Refresh Temperature and Auto Self Refresh Description ............................................................ 182
Self Refresh Mode Summary ........................................................................................................... 182
Command to Power-Down Entry Parameters .................................................................................. 183
Power-Down Modes ....................................................................................................................... 184
Truth Table – ODT (Nominal) ......................................................................................................... 194
ODT Parameters ............................................................................................................................ 194
Write Leveling with Dynamic ODT Special Case .............................................................................. 195
Dynamic ODT Specific Parameters ................................................................................................. 196
Mode Registers for R
TT,nom
............................................................................................................. 196
Mode Registers for R
TT(WR)
............................................................................................................. 197
Timing Diagrams for Dynamic ODT ................................................................................................ 197
Synchronous ODT Parameters ........................................................................................................ 202
Asynchronous ODT Timing Parameters for All Speed Bins ............................................................... 207
ODT Parameters for Power-Down (DLL Off ) Entry and Exit Transition Period ................................... 209
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
7
Micron Technology, Inc. reserves the right to change products or specifications without notice.
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