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MT41J256M4 参数 Datasheet PDF下载

MT41J256M4图片预览
型号: MT41J256M4
PDF下载: 下载PDF文件 查看货源
内容描述: DDR3 SDRAM MT41J256M4 â ????梅格32 ×4× 8银行MT41J128M8 â ????梅格16 ×8× 8银行MT41J64M16 â ???? 8梅格×16× 8银行 [DDR3 SDRAM MT41J256M4 – 32 Meg x 4 x 8 banks MT41J128M8 – 16 Meg x 8 x 8 banks MT41J64M16 – 8 Meg x 16 x 8 banks]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 214 页 / 2938 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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1Gb: x4, x8, x16 DDR3 SDRAM
Features
List of Tables
Table 1: Key Timing Parameters ....................................................................................................................... 1
Table 2: Addressing ......................................................................................................................................... 2
Table 3: 78-Ball FBGA – x4, x8 Ball Descriptions .............................................................................................. 19
Table 4: 86-Ball FBGA – x4, x8 Ball Descriptions .............................................................................................. 21
Table 5: 96-Ball FBGA – x16 Ball Descriptions ................................................................................................. 23
Table 6: Absolute Maximum Ratings .............................................................................................................. 30
Table 7: DDR3 Input/Output Capacitance ...................................................................................................... 31
Table 8: Thermal Characteristics .................................................................................................................... 32
Table 9: Timing Parameters Used for I
DD
Measurements – Clock Units ............................................................ 34
Table 10: I
DD0
Measurement Loop .................................................................................................................. 35
Table 11: I
DD1
Measurement Loop .................................................................................................................. 36
Table 12: I
DD
Measurement Conditions for Power-Down Currents ................................................................... 37
Table 13: I
DD2N
and I
DD3N
Measurement Loop ................................................................................................ 38
Table 14: I
DD2NT
Measurement Loop .............................................................................................................. 38
Table 15: I
DD4R
Measurement Loop ................................................................................................................ 39
Table 16: I
DD4W
Measurement Loop ............................................................................................................... 40
Table 17: I
DD5B
Measurement Loop ................................................................................................................ 41
Table 18: I
DD
Measurement Conditions for I
DD6
, I
DD6ET
, and I
DD8
.................................................................... 42
Table 19: I
DD7
Measurement Loop .................................................................................................................. 43
Table 20: I
DD
Maximum Limits – Rev. B, D, F ................................................................................................... 45
Table 21: I
DD
Maximum Limits – Rev. G .......................................................................................................... 46
Table 22: DC Electrical Characteristics and Operating Conditions ................................................................... 47
Table 23: DC Electrical Characteristics and Input Conditions .......................................................................... 47
Table 24: Input Switching Conditions ............................................................................................................. 48
Table 25: Control and Address Pins ................................................................................................................ 50
Table 26: Clock, Data, Strobe, and Mask Pins .................................................................................................. 50
Table 27: Differential Input Operating Conditions (CK, CK# and DQS, DQS#) .................................................. 51
Table 28: Allowed Time Before Ringback (
t
DVAC) for CK - CK# and DQS - DQS# ............................................... 53
Table 29: Single-Ended Input Slew Rate Definition .......................................................................................... 54
Table 30: Differential Input Slew Rate Definition ............................................................................................. 56
Table 31: On-Die Termination DC Electrical Characteristics ............................................................................ 57
Table 32: R
TT
Effective Impedances ................................................................................................................ 58
Table 33: ODT Sensitivity Definition .............................................................................................................. 59
Table 34: ODT Temperature and Voltage Sensitivity ........................................................................................ 59
Table 35: ODT Timing Definitions .................................................................................................................. 60
Table 36: Reference Settings for ODT Timing Measurements ........................................................................... 60
Table 37: 34 Ohm Driver Impedance Characteristics ....................................................................................... 64
Table 38: 34 Ohm Driver Pull-Up and Pull-Down Impedance Calculations ....................................................... 65
Table 39: 34 Ohm Driver I
OH
/I
OL
Characteristics: V
DD
= V
DDQ
= 1.5V ................................................................ 65
Table 40: 34 Ohm Driver I
OH
/I
OL
Characteristics: V
DD
= V
DDQ
= 1.575V ............................................................. 65
Table 41: 34 Ohm Driver I
OH
/I
OL
Characteristics: V
DD
= V
DDQ
= 1.425V ............................................................. 66
Table 42: 34 Ohm Output Driver Sensitivity Definition .................................................................................... 66
Table 43: 34 Ohm Output Driver Voltage and Temperature Sensitivity .............................................................. 66
Table 44: 40 Ohm Driver Impedance Characteristics ....................................................................................... 67
Table 45: 40 Ohm Output Driver Sensitivity Definition .................................................................................... 67
Table 46: 40 Ohm Output Driver Voltage and Temperature Sensitivity .............................................................. 68
Table 47: Single-Ended Output Driver Characteristics ..................................................................................... 69
Table 48: Differential Output Driver Characteristics ........................................................................................ 70
Table 49: Single-Ended Output Slew Rate Definition ....................................................................................... 72
Table 50: Differential Output Slew Rate Definition .......................................................................................... 73
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
6
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