512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Timing Diagrams
Figure 51:
T0
CLK
tCKS
CKE
tCMS
COMMAND
tCMH
NOP
NOP
NOP
WRITE
NOP
NOP
NOP
ACTIVE
NOP
Single WRITE – With Auto Precharge
T1
tCK
tCKH
tCL
tCH
T2
T3
T4
T5
T6
T7
T8
T9
ACTIVE
tCMS
DQM
tAS
ADDR
tAS
A10
tAS
BA0, BA1
tAH
ROW
tCMH
COLUMN
m
ENABLE AUTO PRECHARGE
ROW
tAH
ROW
ROW
tAH
BANK
BANK
BANK
tDS
DQ
tRCD
tRAS
tRC
tDH
D
IN
m
tWR
tRP
DON’T CARE
Notes:
1. For this example, BL = 1, and the WRITE burst is followed by a manual PRECHARGE.
2. There must be one
t
CK during the
t
WR time for WRITE auto precharge.
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. H 6/07 EN
68
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