512Mb: x4, x8, x16 SDRAM
General Description
Figure 3:
32 Meg x 16 SDRAM Functional Block Diagram
CKE
CLK
CS#
WE#
CAS#
RAS#
CONTROL
LOGIC
BANK3
BANK2
BANK1
COMMAND
DECODE
MODE REGISTER
REFRESH 13
COUNTER
12
13
ROW-
ADDRESS
MUX
13
BANK0
ROW-
ADDRESS
LATCH
&
DECODER
8192
BANK0
MEMORY
ARRAY
(8,192 x 1,024 x 16)
2
2
DQML,
DQMH
SENSE AMPLIFIERS
16
16384
DATA
OUTPUT
REGISTER
2
A0–A12,
BA0, BA1
ADDRESS
REGISTER
BANK
CONTROL
LOGIC
15
I/O GATING
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
16
1024
(x16)
16
DQ0–
DQ15
2
DATA
INPUT
REGISTER
COLUMN
DECODER
COLUMN-
ADDRESS
COUNTER/
LATCH
10
10
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000 Micron Technology, Inc. All rights reserved.
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