128Mb: x32 SDRAM
Truth Tables
Table 17: Truth Table – CKE
Notes 1–4 apply to all parameters and conditions
Current State
CKE
n-1
CKE
n
Power-down
Self refresh
Clock suspend
Power-down
Self refresh
Clock suspend
All banks idle
All banks idle
Reading or writing
H
Notes:
H
H
L
L
H
L
L
Command
n
X
X
X
COMMAND INHIBIT or NOP
COMMAND INHIBIT or NOP
X
COMMAND INHIBIT or NOP
AUTO REFRESH
VALID
See Table 16 (page 32).
Action
n
Maintain power-down
Maintain self refresh
Maintain clock suspend
Exit power-down
Exit self refresh
Exit clock suspend
Power-down entry
Self refresh entry
Clock suspend entry
Notes
1. CKE
n
is the logic state of CKE at clock edge n; CKE
n-1
was the state of CKE at the previ-
ous clock edge.
2. Current state is the state of the SDRAM immediately prior to clock edge
n.
3. COMMAND
n
is the command registered at clock edge
n,
and ACTION
n
is a result of
COMMAND
n
.
4. All states and sequences not shown are illegal or reserved.
5. Exiting power-down at clock edge
n
will put the device in the all banks idle state in time
for clock edge
n
+ 1 (provided that
t
CKS is met).
6. Exiting self refresh at clock edge
n
will put the device in the all banks idle state after
t
XSR is met. COMMAND INHIBIT or NOP commands should be issued on any clock edges
occurring during the
t
XSR period. A minimum of two NOP commands must be provided
during the
t
XSR period.
7. After exiting clock suspend at clock edge
n,
the device will resume operation and recog-
nize the next command at clock edge
n
+ 1.
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2001 Micron Technology, Inc. All rights reserved.
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