128Mb: x32 SDRAM
Functional Block Diagram
Functional Block Diagram
Figure 1: 4 Meg x 32 Functional Block Diagram
Control
CKE
logic
CLK
CS#
WE#
CAS#
RAS#
Bank 3
Bank 2
Bank 1
Refresh
12
counter
Bank 0
row-
address
latch
Mode register
12
Row-
address
MUX
12
Bank 0
memory
array
1
1
4096
DQM
12
and
(4096 x 2048 x 4)
decoder
Sense amplifiers
4096
Data
output
register
4
I/O gating
DQM mask logic
read data latch
write drivers
4
2
DQ[3:0]
Bank
control
logic
A[11:0],
BA0, BA1
Address
register
14
Data
input
register
2
4
2048
(x4)
Column
decoder
Column-
address
counter/
latch
11
11
PDF: 09005aef80872800
128mb_x32_sdram.pdf - Rev. P 9/11 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
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