16Mb: 1 MEG x16
EDO DRAM
EARLY WRITE CYCLE
tRC
tRAS
V IH
V IL
tCSH
tRSH
tCRP
CASL#/CASH#
V IH
V IL
tRAD
tASR
ADDR
V IH
V IL
ROW
tRAH
COLUMN
tCWL
tRWL
tWCS
tWCR
tWCH
tWP
WE#
V IH
V IL
tDS
V
DQ V IOH
IOL
V IH
V IL
tDH
tAR
tASC
tCAH
tACH
ROW
tRCD
tCAS
tCLCH
tRP
RAS#
VALID DATA
OE#
DON’T CARE
UNDEFINED
TIMING PARAMETERS
-5
SYMBOL
t
ACH
t
AR
t
ASC
t
ASR
t
CAH
t
CAS
t
CLCH
t
CRP
t
CSH
t
CWL
t
DH
t
DS
-6
MAX
MIN
15
45
0
0
10
10
5
5
45
10
10
0
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYMBOL
t
RAD
t
RAH
t
RAS
t
RC
t
RCD
t
RP
t
RSH
t
RWL
t
WCH
t
WCR
t
WCS
t
WP
-5
MIN
9
9
50
84
11
30
13
13
8
38
0
5
MAX
MIN
12
10
60
104
14
40
15
15
10
45
0
5
-6
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MIN
12
38
0
0
8
8
5
5
38
8
8
0
10,000
10,000
10,000
10,000
1 Meg x 16 EDO DRAM
D52_B.p65 – Rev. B; Pub. 3/01
13
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc
MICRON [ MICRON TECHNOLOGY ]
