8 MEG x 8
EDO DRAM
EDO-PAGE-MODE READ-WRITE CYCLE
(LATE WRITE and READ-MODIFY-WRITE cycles)
t
t
RASP
RP
V
V
IH
IL
RAS#
CAS#
t
t
t
t
t
NOTE 1
CSH
PC
PRWC
RSH
CAS
t
t
t
t
t
t
t
CRP
RCD
CAS
CP
CAS
CP
CP
V
V
IH
IL
t
AR
t
t
RAD
RAH
t
t
t
t
t
t
t
CAH
ASR
ASC
CAH
ASC
CAH
ASC
V
V
IH
IL
ADDR
ROW
COLUMN
COLUMN
COLUMN
ROW
t
RWD
t
RWL
t
RCS
t
t
t
CWL
CWL
CWL
t
t
t
WP
WP
WP
t
t
t
t
t
t
AWD
AWD
AWD
CWD
CWD
CWD
V
V
IH
IL
WE#
t
t
t
t
AA
AA
AA
t
RAC
t
t
t
DH
DH
DH
t
CPA
CPA
t
t
t
DS
DS
DS
t
t
t
t
t
t
CAC
CLZ
CAC
CLZ
CAC
CLZ
V
V
IOH
IOL
VALID
OUT
VALID
IN
VALID
OUT
VALID
IN
VALID
OUT
VALID
IN
DQ
OPEN
OPEN
D
D
D
D
D
D
t
t
t
OD
OD
OD
t
t
t
OE
t
OE
OE
OEH
V
V
IH
IL
OE#
DON’T CARE
UNDEFINED
TIMING PARAMETERS
-5
-6
-5
-6
SYMBOL
MIN
MAX
MIN
MAX
UNITS
SYMBOL
MIN
MAX
MIN
MAX
15
UNITS
ns
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AA
25
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
OD
0
12
12
0
t
AR
38
0
45
0
OE
15
ns
t
ASC
OEH
PC
8
12
25
56
ns
t
ASR
0
0
20
47
ns
t
AWD
42
49
PRWC
RAC
RAD
RAH
RASP
RCD
RCS
RP
ns
t
CAC
13
15
50
60
ns
t
CAH
8
8
0
8
10
10
0
9
12
10
60
14
0
ns
t
CAS
10,000
28
10,000
9
ns
t
CLZ
50
11
0
125,000
125,000
ns
t
CP
10
ns
t
CPA
35
ns
t
CRP
5
38
28
8
5
30
13
67
13
5
40
15
79
15
5
ns
t
CSH
45
35
10
10
0
RSH
RWD
RWL
WP
ns
t
CWD
ns
t
CWL
ns
t
DH
8
ns
t
DS
0
t
NOTE: 1. PC is for LATE WRITE cycles only.
8 Meg x 8 EDO DRAM
D20_2.p65 – Rev. 5/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.
15
MICRON [ MICRON TECHNOLOGY ]
