2Mb: 128K x 18, 64K x 32/36
FLOW-THROUGH SYNCBURST SRAM
INTERLEAVED BURST ADDRESS TABLE (MODE = NC OR HIGH)
FIRST ADDRESS (EXTERNAL)
X...X00
X...X01
X...X10
X...X11
SECOND ADDRESS (INTERNAL)
X...X01
X...X00
X...X11
X...X10
THIRD ADDRESS (INTERNAL)
X...X10
X...X11
X...X00
X...X01
FOURTH ADDRESS (INTERNAL)
X...X11
X...X10
X...X01
X...X00
LINEAR BURST ADDRESS TABLE (MODE = LOW)
FIRST ADDRESS (EXTERNAL)
X...X00
X...X01
X...X10
X...X11
SECOND ADDRESS (INTERNAL)
X...X01
X...X10
X...X11
X...X00
THIRD ADDRESS (INTERNAL)
X...X10
X...X11
X...X00
X...X01
FOURTH ADDRESS (INTERNAL)
X...X11
X...X00
X...X01
X...X10
PARTIAL TRUTH TABLE FOR WRITE COMMANDS (x18)
FUNCTION
READ
READ
WRITE Byte “a”
WRITE Byte “b”
WRITE All Bytes
WRITE All Bytes
GW#
H
H
H
H
H
L
BWE#
H
L
L
L
L
X
BWa#
X
H
L
H
L
X
BWb#
X
H
H
L
L
X
PARTIAL TRUTH TABLE FOR WRITE COMMANDS (x32/x36)
FUNCTION
READ
READ
WRITE Byte “a”
WRITE All Bytes
WRITE All Bytes
GW#
H
H
H
H
L
BWE#
H
L
L
L
X
BWa#
X
H
L
L
X
BWb#
X
H
H
L
X
BWc#
X
H
H
L
X
BWd#
X
H
H
L
X
NOTE:
Using BWE# and BWa# through BWd#, any one or more bytes may be written.
2Mb: 128K x 18, 64K x 32/36 Flow-Through SyncBurst SRAM
MT58L128L18F_2.p65 – Rev. 6/01
7
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.
MICRON [ MICRON TECHNOLOGY ]
