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MT58L64L32F 参数 Datasheet PDF下载

MT58L64L32F图片预览
型号: MT58L64L32F
PDF下载: 下载PDF文件 查看货源
内容描述: 2MB : 128K ×18 , 64K X 32/36流通型SyncBurst SRAM [2Mb: 128K x 18, 64K x 32/36 FLOW-THROUGH SYNCBURST SRAM]
分类和应用: 静态存储器
文件页数/大小: 24 页 / 481 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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2Mb: 128K x 18, 64K x 32/36
FLOW-THROUGH SYNCBURST SRAM
ABSOLUTE MAXIMUM RATINGS*
Voltage on V
DD
Supply
Relative to V
SS
.................................... -0.5V to +4.6V
Voltage on V
DD
Q Supply
Relative to V
SS
.................................... -0.5V to +4.6V
V
IN
............................................... -0.5V to V
DD
Q + 0.5V
Storage Temperature (plastic) ............ -55°C to +150°C
Junction Temperature** .................................... +150°C
Short Circuit Output Current ........................... 100mA
*Stresses greater than those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only, and functional
operation of the device at these or any other conditions
above those indicated in the operational sections of
this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect reliability.
**Maximum junction temperature depends upon pack-
age type, cycle time, loading, ambient temperature and
airflow. See Micron Technical Note TN-05-14 for more
information.
3.3V I/O DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS
(0°C
T
A
+70°C; V
DD
, V
DD
Q = +3.3V +0.3V/-0.165V unless otherwise noted)
DESCRIPTION
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Supply Voltage
Isolated Output Buffer Supply
CONDITIONS
SYMBOL
V
IH
V
IL
IL
I
IL
O
V
OH
V
OL
V
DD
V
DD
Q
MIN
2.0
-0.3
-1.0
-1.0
2.4
3.135
3.135
MAX
V
DD
+ 0.3
0.8
1.0
1.0
0.4
3.6
V
DD
UNITS
V
V
µA
µA
V
V
V
V
NOTES
1, 2
1, 2
3
0V
V
IN
V
DD
Output(s) disabled,
0V
V
IN
V
DD
I
OH
= -4.0mA
I
OL
= 8.0mA
1, 4
1, 4
1
1, 5
2.5V I/O DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS
(0°C
T
A
+70°C; V
DD
= +3.3V +0.3V/-0.165V; V
DD
Q = +2.5V +0.4V/-0.125V unless otherwise noted)
DESCRIPTION
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Supply Voltage
Isolated Output Buffer Supply
0V
V
IN
V
DD
Output(s) disabled,
0V
V
IN
V
DD
Q (DQx)
I
OH
= -2.0mA
I
OH
= -1.0mA
I
OL
= 2.0mA
I
OL
= 1.0mA
CONDITIONS
Data bus (DQx)
Inputs
SYMBOL
V
IH
Q
V
IH
V
IL
IL
I
IL
O
V
OH
V
OH
V
OL
V
OL
V
DD
V
DD
Q
MIN
1.7
1.7
-0.3
-1.0
-1.0
1.7
2.0
3.135
2.375
MAX
V
DD
Q + 0.3
V
DD
+ 0.3
0.7
1.0
1.0
0.7
0.4
3.6
2.9
UNITS
V
V
V
µA
µA
V
V
V
V
V
V
1, 4
1, 4
1, 4
1, 4
1
1
NOTES
1, 2
1, 2
1, 2
3
NOTE:
1. All voltages referenced to V
SS
(GND).
2. Overshoot:
V
IH
+4.6V for t
t
KC/2 for I
20mA
Undershoot: V
IL
-0.7V for t
t
KC/2 for I
20mA
Power-up:
V
IH
+3.6V and V
DD
3.135V for t
200ms
3. MODE pin has an internal pull-up, and input leakage = ±10µA.
4. The load used for V
OH
, V
OL
testing is shown in Figure 2 for 3.3V I/O and Figure 4 for 2.5V I/O. AC load current is higher
than the stated DC values. AC I/O curves are available upon request.
5. V
DD
Q should never exceed V
DD
. V
DD
and V
DD
Q can be connected together for 3.3V I/O.
2Mb: 128K x 18, 64K x 32/36 Flow-Through SyncBurst SRAM
MT58L128L18F_2.p65 – Rev. 6/01
9
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.