N25Q128 - 1.8 V
Instructions
Figure 69. Write Volatile Enhanced Configuration Register instruction sequence
DIO-SPI
S
0
1
2
3
4
5
6
7
8
9 10 11
C
Volatile Enhanced
Configuration Register In
Byte
Byte
Instruction
6
4
2
0
1
6
7
4
5
2
0
1
DQ0
DQ1
7
5
3
3
Dual_Write_VECR
9.2.25
Deep Power-down (DP)
The Deep-Power-down (DP) instruction sets the device in Deep Power-down mode. Apart
form the parallelizing of the instruction code on the two pins DQ0 and DQ1, the instruction
functionality is exactly the same as the Deep Power-down (DP) instruction of the Extended
SPI protocol. The instruction sequence is shown in Figure 70: Deep Power-down instruction
sequence.
Figure 70. Deep Power-down instruction sequence
S
tDP
0
1
2
3
C
Instruction
DQ0
DQ1
Standby mode Deep power-down mode
Dual_DP
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