DC and AC parameters
Table 33.
Symbol
tVPPHSL
(6)
tW
tCFSR
tWNVCR
tWVCR
tWRVECR
tPP
(7)
N25Q128 - 1.8 V
AC Characteristics (page 2 of 2)
Alt.
Parameter
Enhanced program supply voltage High
(VPPH) to Chip Select Low for Single and
Dual I/O Page Program
Write status register cycle time
Clear flag status register cycle time
Write non volatile configuration register
cycle time
Write volatile configuration register cycle
time
Write volatile enhanced
configurationregister cycle time
Page program cycle time (n bytes)
Program OTP cycle time (64 bytes)
Min
200
1.3
40
0.2
40
40
int(n/8) ×
0.015
(8)
0.4
0.2
0.7
170
2
3
250
5
3
8
Typ
(2)
Max
Unit
ns
ms
ns
s
ns
ns
ms
ms
s
s
s
tSSE
tSE
tBE
Subsector erase cycle time
Sector erase cycle time
Bulk erase cycle time
1. tCH + tCL must be greater than or equal to 1/ fC.
2. Typical values given for TA = 25 °C
3. Value guaranteed by characterization, not 100% tested in production.
4. Expressed as a slew-rate.
5. Only applicable as a constraint for a WRSR instruction when SRWD is set to '1'.
6. VPPH should be kept at a valid level until the program or erase operation has completed and its result (success or failure)
is known. Avoid applying VPPH to the W/VPP pin during Bulk Erase.
7. When using the page program (PP) instruction to program consecutive bytes, optimized timings are obtained with one
sequence including all the bytes versus several sequences of only a few bytes (1 < n < 256).
8. int(A) corresponds to the upper integer part of A. For example int(12/8) = 2, int(32/8) = 4 int(15.3) =16.
Figure 108. Reset AC waveforms: program or erase cycle is in progress
S
tSHRH
tRLRH
tRHSL
Reset
AI06808
See
Table 34.: Reset Conditions.
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