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N25Q128A11B1241F 参数 Datasheet PDF下载

N25Q128A11B1241F图片预览
型号: N25Q128A11B1241F
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位, 1.8 V ,多个I / O , 4 KB的界别分组擦除引导扇区, XIP启用,串行闪存与108 MHz的SPI总线接口 [128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 185 页 / 5874 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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N25Q128 - 1.8 V  
Volatile and Non Volatile Registers  
6.2.7  
Dual Input NV configuration bit (NVCR bit 2)  
The Dual Input NV configuration bit can be used to make the memory start working in DIO-  
SPI protocol directly after the power on sequence. The products are delivered with this set  
to 1, making the memory default in Extended SPI protocol, if the application sets this bit to 0  
the device will enter in QIO-SPI protocol right after the next power on.  
Please note that in case both QIO-SPI and DIO-SPI are enabled (both bit 3 and bit 2 of the  
Non Volatile Configuration Register set to 0), the memory will work in QIO-SPI.  
6.3  
Volatile Configuration Register  
The Volatile Configuration Register (VCR) affects the memory configuration after every  
execution of Write Volatile Configuration Register (WRVCR) instruction: this instruction  
overwrite the memory configuration set at POR by the Non Volatile Configuration Register  
(NVCR). Its purpose is to define the dummy clock cycles number and to make the device  
ready to enter in the required XIP mode.  
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