128Mb, 256Mb, 512Mb, 1Gb StrataFlash Memory
Common Flash Interface
Table 50: One Time Programmable (OTP) Space Information (Continued)
Hex Offset
P = 10Ah
Hex
Code
ASCII Value
(DQ[7:0])
Length
Description
Address
124:
(P+1A)h
(P+1B)h
(P+1C)h
3
Bits 56–63 = n where n equals user-programmed
groups (low byte).
Bits 64–71 = n where n equals user-programmed
groups (high byte).
- -10
- -00
- -04
16
0
125:
126:
16
Bits 72–79 = n where n equals user programma-
ble bytes/groups.
Table 51: Burst Read Informaton
Hex Offset
Hex
Code
ASCII Value
(DQ[7:0])
P = 10Ah
Length
Description
Address
1
Page mode read capability:
127:
- -05 (Non
Mux)
- -00 (A/D
Mux)
32 byte (Non
Mux)
0 (A/D Mux)
Bits 7–0 = n where 2n hex value represents the
number of read page bytes. See offset 28h for
device word width to determine page mode data
output width. 00h indicates no read page buffer.
(P+1D)h
1
1
Number of synchronous mode read configuration
fields that follow. 00h indicates no burst capabili-
ty.
128:
129:
- -03
- -02
(P+1E)h
3
Synchronous mode read capability configuration
1:
Bits 3–7 = reserved.
Bits 0–2 = n where 2n+1 hex value represents the
maximum number of continuous synchronous
reads when the device is configured for its maxi-
mum word width.
(P+1F)h
A value of 07h indicates that the device is capa-
ble of continuous linear bursts that will output
data until the internal burst counter reaches the
end of the device’s burstable address space.
This fields’s 3-bit value can be written directly to
the RCR bits 0–2 if the device is configured for its
maximum word width. See offset 28h for word
width to determine the burst data output width.
8
1
1
Synchronous mode read capability configuration
2.
12A:
12B:
- -03
- -07
16
(P+20)h
(P+21)h
Synchronous mode read capability configuration
3.
Cont
PDF: 09005aef8448483a
128_256_512_65nm_g18.pdf - Rev. F 8/11 EN
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