256Mb and 512Mb (256Mb/256Mb), P30-65nm
Erase Operations
The status register can be examined for Blank Check progress and errors by reading any
address within the block being accessed. During a blank check operation, the Status
Register indicates a busy status (SR.7 = 0). Upon completion, the Status Register indi-
cates a ready status (SR.7 = 1). The Status Register should be checked for any errors, and
then cleared. If the Blank Check operation fails, which means the block is not complete-
ly erased, the Status Register bit SR.5 will be set (“1”). CE# or OE# toggle (during polling)
updates the Status Register.
After examining the Status Register, it should be cleared by the Clear Status Register
command before issuing a new command. The device remains in Status Register Mode
until another command is written to the device. Any command can follow once the
Blank Check command is complete.
Erase Suspend
Issuing the Erase Suspend command while erasing suspends the block erase operation.
This allows data to be accessed from memory locations other than the one being
erased. The Erase Suspend command can be issued to any device address. A block erase
operation can be suspended to perform a word or buffer program operation, or a read
operation within any block except the block that is erase suspended.
When a block erase operation is executing, issuing the Erase Suspend command re-
quests the WSM to suspend the erase algorithm at predetermined points. The device
continues to output Status Register data after the Erase Suspend command is issued.
Block erase is suspended when Status Register bits SR[7,6] are set.
To read data from the device (other than an erase-suspended block), the Read Array
command must be issued. During Erase Suspend, a Program command can be issued to
any block other than the erase-suspended block. Block erase cannot resume until pro-
gram operations initiated during erase suspend complete. Read Array, Read Status Reg-
ister, Read Device Identifier, Read CFI, and Erase Resume are valid commands during
Erase Suspend. Additionally, Clear Status Register, Program, Program Suspend, Block
Lock, Block Unlock, and Block Lock-Down are valid commands during Erase Suspend.
During an erase suspend, deasserting CE# places the device in standby, reducing active
current. V
PP
must remain at a valid level, and WP# must remain unchanged while in
erase suspend. If RST# is asserted, the device is reset.
Erase Resume
The Erase Resume command instructs the device to continue erasing, and automatical-
ly clears status register bits SR[7,6]. This command can be written to any address. If sta-
tus register error bits are set, the Status Register should be cleared before issuing the
next instruction. RST# must remain deasserted.
Erase Protection
When V
PP
= V
IL
, absolute hardware erase protection is provided for all device blocks. If
V
PP
is at or below V
PPLK
, erase operations halt and SR.3 is set indicating a V
PP
-level error.
PDF: 09005aef84566799
p30_65nm_256Mb-512mb.pdf - Rev. A 1/13 EN
39
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