256Mb and 512Mb (256Mb/256Mb), P30-65nm
Common Flash Interface
Table 24: System Interface Information
Hex
Hex
Code
ASCII Value
(DQ[7:0])
Offset
Length
Description
Address
1Bh
1
VCC logic supply minimum program/erase voltage.
bits 0 - 3 BCD 100 mV
1Bh
- -17
1.7V
bits 4 - 7 BCD volts
1Ch
1Dh
1Eh
1
1
1
VCC logic supply maximum program/erase volt-
age.
bits 0 - 3 BCD 100 mV
bits 4 - 7 BCD volts
1Ch
1Dh
1Eh
- -20
2.0V
VPP [programming] supply minimum program/
erase voltage.
bits 0 - 3 BCD 100 mV
- -85
- -95
8.5V
9.5V
bits 4 - 7 hex volts
VPP [programming] supply maximum program/
erase voltage.
bits 0 - 3 BCD 100 mV
bits 4 - 7 hex volts
1Fh
20h
1
1
“n” such that typical single word program time-
1Fh
20h
- -09
- -0A
512µs
out = 2n μs.
“n” such that typical full buffer write timeout =
2n μs.
1024µs
21h
22h
1
1
“n” such that typical block erase timeout = 2n ms.
“n” such that typical full chip erase timeout = 2n
ms.
21h
22h
- -0A
- -00
1s
NA
23h
24h
25h
26h
1
1
1
1
“n” such that maximum word program timeout =
2n times typical.
23h
24h
25h
26h
- -01
- -02
- -02
- -00
1024µs
4096µs
4s
“n” such that maximum buffer write timeout =
2n times typical.
“n” such that maximum block erase timeout = 2n
times typical.
“n” such that maximum chip erase timeout = 2n
times typical.
NA
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. C 12/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
57
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